Add Renesas RH850 architecture support

CMakeLists.txt

@@ -63,7 +63,7 @@ option(BUILD_SHARED_LIBS "Build shared instead of static library" ${PROJECT_IS_T
 option(UNICORN_FUZZ "Enable fuzzing" OFF)
 option(UNICORN_BUILD_TESTS "Build unicorn tests" ${PROJECT_IS_TOP_LEVEL})
 option(UNICORN_INSTALL "Enable unicorn installation" ${PROJECT_IS_TOP_LEVEL})
-set(UNICORN_ARCH "x86;arm;aarch64;riscv;mips;sparc;m68k;ppc;s390x;tricore" CACHE STRING "Enabled unicorn architectures")
+set(UNICORN_ARCH "x86;arm;aarch64;riscv;mips;sparc;m68k;ppc;rh850;s390x;tricore" CACHE STRING "Enabled unicorn architectures")
 option(UNICORN_TRACER "Trace unicorn execution" OFF)
 
 foreach(ARCH_LOOP ${UNICORN_ARCH})
@@ -268,6 +268,9 @@ else()
     if(UNICORN_HAS_PPC)
         set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_PPC ")
     endif()
+    if(UNICORN_HAS_RH850)
+        set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_RH850 ")
+    endif()
     if(UNICORN_HAS_RISCV)
         set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_RISCV ")
     endif()
@@ -315,6 +318,9 @@ else()
     if(UNICORN_HAS_PPC)
         set(TARGET_LIST "${TARGET_LIST}ppc-softmmu, ppc64-softmmu, ")
     endif()
+    if(UNICORN_HAS_RH850)
+        set(TARGET_LIST "${TARGET_LIST}rh850-softmmu, ")
+    endif()
     if(UNICORN_HAS_RISCV)
         set(TARGET_LIST "${TARGET_LIST}riscv32-softmmu, riscv64-softmmu, ")
     endif()
@@ -399,6 +405,12 @@ else()
             OUTPUT_FILE ${CMAKE_BINARY_DIR}/ppc64-softmmu/config-target.h
         )
     endif()
+    if(UNICORN_HAS_RH850)
+        execute_process(COMMAND sh ${CMAKE_CURRENT_SOURCE_DIR}/qemu/scripts/create_config
+            INPUT_FILE ${CMAKE_BINARY_DIR}/rh850-softmmu/config-target.mak
+            OUTPUT_FILE ${CMAKE_BINARY_DIR}/rh850-softmmu/config-target.h
+        )
+    endif()
     if(UNICORN_HAS_RISCV)
         execute_process(COMMAND sh ${CMAKE_CURRENT_SOURCE_DIR}/qemu/scripts/create_config
             INPUT_FILE ${CMAKE_BINARY_DIR}/riscv32-softmmu/config-target.mak
@@ -1119,6 +1131,36 @@ endif()
 endif()
 
 
+if (UNICORN_HAS_RH850)
+add_library(rh850-softmmu STATIC
+    ${UNICORN_ARCH_COMMON}
+
+    qemu/target/rh850/cpu.c
+    qemu/target/rh850/fpu_helper.c
+    qemu/target/rh850/helper.c
+    qemu/target/rh850/op_helper.c
+    qemu/target/rh850/translate.c
+    qemu/target/rh850/fpu_translate.c
+    qemu/target/rh850/unicorn.c
+)
+
+if(MSVC)
+    target_compile_options(rh850-softmmu PRIVATE
+        -DNEED_CPU_H
+        /FIrh850.h
+        /I${CMAKE_CURRENT_SOURCE_DIR}/msvc/rh850-softmmu
+        /I${CMAKE_CURRENT_SOURCE_DIR}/qemu/target/rh850
+    )
+else()
+    target_compile_options(rh850-softmmu PRIVATE
+        -DNEED_CPU_H
+        -include rh850.h
+        -I${CMAKE_BINARY_DIR}/rh850-softmmu
+        -I${CMAKE_CURRENT_SOURCE_DIR}/qemu/target/rh850
+    )
+endif()
+endif()
+
 set(UNICORN_SRCS
     uc.c
 
@@ -1266,6 +1308,13 @@ if(UNICORN_HAS_PPC)
     target_link_libraries(ppc64-softmmu PRIVATE unicorn-common)
     set(UNICORN_TEST_FILE ${UNICORN_TEST_FILE} test_ppc)
 endif()
+if(UNICORN_HAS_RH850)
+    set(UNICORN_COMPILE_OPTIONS ${UNICORN_COMPILE_OPTIONS} -DUNICORN_HAS_RH850)
+    set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} rh850-softmmu rh850-softmmu)
+    set(UNICORN_SAMPLE_FILE ${UNICORN_SAMPLE_FILE} sample_rh850)
+    target_link_libraries(rh850-softmmu PRIVATE unicorn-common)
+    set(UNICORN_TEST_FILE ${UNICORN_TEST_FILE} test_rh850)
+endif()
 if(UNICORN_HAS_RISCV)
     set(UNICORN_COMPILE_OPTIONS ${UNICORN_COMPILE_OPTIONS} -DUNICORN_HAS_RISCV)
     set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} riscv32-softmmu riscv64-softmmu)

Cargo.toml

@@ -42,7 +42,7 @@ pkg-config = { version = "0.3" }
 [features]
 default = ["arch_all"]
 dynamic_linkage = []
-arch_all = ["arch_x86", "arch_arm", "arch_aarch64", "arch_riscv", "arch_mips", "arch_sparc", "arch_m68k", "arch_ppc", "arch_s390x", "arch_tricore"]
+arch_all = ["arch_x86", "arch_arm", "arch_aarch64", "arch_riscv", "arch_mips", "arch_sparc", "arch_m68k", "arch_ppc", "arch_s390x", "arch_tricore", "arch_rh850"]
 arch_x86 = []
 arch_arm = []
 arch_aarch64 = []
@@ -53,3 +53,4 @@ arch_m68k = []
 arch_ppc = []
 arch_s390x = []
 arch_tricore = []
+arch_rh850 = []

bindings/const_generator.py

@@ -6,7 +6,7 @@
 
 INCL_DIR = os.path.join('..', 'include', 'unicorn')
 
-include = [ 'arm.h', 'arm64.h', 'mips.h', 'x86.h', 'sparc.h', 'm68k.h', 'ppc.h', 'riscv.h', 's390x.h', 'tricore.h', 'unicorn.h' ]
+include = [ 'arm.h', 'arm64.h', 'mips.h', 'x86.h', 'sparc.h', 'm68k.h', 'ppc.h', 'rh850.h', 'riscv.h', 's390x.h', 'tricore.h', 'unicorn.h' ]
 
 template = {
     'python': {
@@ -22,6 +22,7 @@
             'sparc.h': 'sparc',
             'm68k.h': 'm68k',
             'ppc.h': 'ppc',
+            'rh850.h': 'rh850',
             'riscv.h': 'riscv',
             's390x.h' : 's390x',
             'tricore.h' : 'tricore',
@@ -43,6 +44,7 @@
             'm68k.h': 'm68k',
             'ppc.h': 'ppc',
             'riscv.h': 'riscv',
+            'rh850.h': 'rh850',
             's390x.h' : 's390x',
             'tricore.h' : 'tricore',
             'unicorn.h': 'unicorn',
@@ -62,6 +64,7 @@
             'sparc.h': 'sparc',
             'm68k.h': 'm68k',
             'ppc.h': 'ppc',
+            'rh850.h': 'rh850',
             'riscv.h': 'riscv',
             's390x.h' : 's390x',
             'tricore.h' : 'tricore',
@@ -82,6 +85,7 @@
             'sparc.h': 'Sparc',
             'm68k.h': 'M68k',
             'ppc.h': 'Ppc',
+            'rh850.h': 'Rh850',
             'riscv.h': 'Riscv',
             's390x.h' : 'S390x',
             'tricore.h' : 'TriCore',
@@ -102,6 +106,7 @@
             'sparc.h': 'Sparc',
             'm68k.h': 'M68k',
             'ppc.h': 'Ppc',
+            'rh850.h': 'Rh850',
             'riscv.h': 'Riscv',
             's390x.h' : 'S390x',
             'tricore.h' : 'TriCore',
@@ -122,6 +127,7 @@
             'sparc.h': 'Sparc',
             'm68k.h': 'M68k',
             'ppc.h': 'Ppc',
+            'rh850.h': 'Rh850',
             'riscv.h': 'Riscv',
             's390x.h' : 'S390x',
             'tricore.h' : 'TriCore',
@@ -143,6 +149,7 @@
             'm68k.h': 'm68k',
             'ppc.h': 'ppc',
             'riscv.h': 'riscv',
+            'rh850.h': 'rh850',
             's390x.h' : 's390x',
             'tricore.h' : 'tricore',
             'unicorn.h': 'unicorn',

bindings/dotnet/UnicornEngine/Const/Common.fs

@@ -28,7 +28,8 @@ module Common =
     let UC_ARCH_RISCV = 8
     let UC_ARCH_S390X = 9
     let UC_ARCH_TRICORE = 10
-    let UC_ARCH_MAX = 11
+    let UC_ARCH_RH850 = 11
+    let UC_ARCH_MAX = 12
 
     let UC_MODE_LITTLE_ENDIAN = 0
     let UC_MODE_BIG_ENDIAN = 1073741824
@@ -55,6 +56,7 @@ module Common =
     let UC_MODE_SPARC32 = 4
     let UC_MODE_SPARC64 = 8
     let UC_MODE_V9 = 16
+    let UC_MODE_RH850 = 4
     let UC_MODE_RISCV32 = 4
     let UC_MODE_RISCV64 = 8
 

bindings/dotnet/UnicornEngine/Const/Rh850.fs

@@ -0,0 +1,99 @@
+// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT
+
+namespace UnicornManaged.Const
+
+open System
+
+[<AutoOpen>]
+module Rh850 =
+    let UC_RH850_SYSREG_SELID0 = 32
+    let UC_RH850_SYSREG_SELID1 = 64
+    let UC_RH850_SYSREG_SELID2 = 96
+    let UC_RH850_SYSREG_SELID3 = 128
+    let UC_RH850_SYSREG_SELID4 = 160
+    let UC_RH850_SYSREG_SELID5 = 192
+    let UC_RH850_SYSREG_SELID6 = 224
+    let UC_RH850_SYSREG_SELID7 = 256
+
+    // RH850 global purpose registers
+
+    let UC_RH850_REG_R0 = 0
+    let UC_RH850_REG_R1 = 1
+    let UC_RH850_REG_R2 = 2
+    let UC_RH850_REG_R3 = 3
+    let UC_RH850_REG_R4 = 4
+    let UC_RH850_REG_R5 = 5
+    let UC_RH850_REG_R6 = 6
+    let UC_RH850_REG_R7 = 7
+    let UC_RH850_REG_R8 = 8
+    let UC_RH850_REG_R9 = 9
+    let UC_RH850_REG_R10 = 10
+    let UC_RH850_REG_R11 = 11
+    let UC_RH850_REG_R12 = 12
+    let UC_RH850_REG_R13 = 13
+    let UC_RH850_REG_R14 = 14
+    let UC_RH850_REG_R15 = 15
+    let UC_RH850_REG_R16 = 16
+    let UC_RH850_REG_R17 = 17
+    let UC_RH850_REG_R18 = 18
+    let UC_RH850_REG_R19 = 19
+    let UC_RH850_REG_R20 = 20
+    let UC_RH850_REG_R21 = 21
+    let UC_RH850_REG_R22 = 22
+    let UC_RH850_REG_R23 = 23
+    let UC_RH850_REG_R24 = 24
+    let UC_RH850_REG_R25 = 25
+    let UC_RH850_REG_R26 = 26
+    let UC_RH850_REG_R27 = 27
+    let UC_RH850_REG_R28 = 28
+    let UC_RH850_REG_R29 = 29
+    let UC_RH850_REG_R30 = 30
+    let UC_RH850_REG_R31 = 31
+
+    // RH850 system registers, selection ID 0
+    let UC_RH850_REG_EIPC = 32
+    let UC_RH850_REG_EIPSW = 33
+    let UC_RH850_REG_FEPC = 34
+    let UC_RH850_REG_FEPSW = 35
+    let UC_RH850_REG_ECR = 36
+    let UC_RH850_REG_PSW = 37
+    let UC_RH850_REG_FPSR = 38
+    let UC_RH850_REG_FPEPC = 39
+    let UC_RH850_REG_FPST = 40
+    let UC_RH850_REG_FPCC = 41
+    let UC_RH850_REG_FPCFG = 42
+    let UC_RH850_REG_FPEC = 43
+    let UC_RH850_REG_EIIC = 45
+    let UC_RH850_REG_FEIC = 46
+    let UC_RH850_REG_CTPC = 48
+    let UC_RH850_REG_CTPSW = 49
+    let UC_RH850_REG_CTBP = 52
+    let UC_RH850_REG_EIWR = 60
+    let UC_RH850_REG_FEWR = 61
+    let UC_RH850_REG_BSEL = 63
+
+    // RH850 system regusters, selection ID 1
+    let UC_RH850_REG_MCFG0 = 64
+    let UC_RH850_REG_RBASE = 65
+    let UC_RH850_REG_EBASE = 66
+    let UC_RH850_REG_INTBP = 67
+    let UC_RH850_REG_MCTL = 68
+    let UC_RH850_REG_PID = 69
+    let UC_RH850_REG_SCCFG = 75
+    let UC_RH850_REG_SCBP = 76
+
+    // RH850 system registers, selection ID 2
+    let UC_RH850_REG_HTCFG0 = 96
+    let UC_RH850_REG_MEA = 102
+    let UC_RH850_REG_ASID = 103
+    let UC_RH850_REG_MEI = 104
+    let UC_RH850_REG_PC = 288
+    let UC_RH850_REG_ENDING = 289
+
+    // RH8509 Registers aliases.
+
+    let UC_RH850_REG_ZERO = 0
+    let UC_RH850_REG_SP = 3
+    let UC_RH850_REG_EP = 30
+    let UC_RH850_REG_LP = 31
+

bindings/go/unicorn/rh850_const.go

@@ -0,0 +1,94 @@
+package unicorn
+// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [rh850_const.go]
+const (
+	RH850_SYSREG_SELID0 = 32
+	RH850_SYSREG_SELID1 = 64
+	RH850_SYSREG_SELID2 = 96
+	RH850_SYSREG_SELID3 = 128
+	RH850_SYSREG_SELID4 = 160
+	RH850_SYSREG_SELID5 = 192
+	RH850_SYSREG_SELID6 = 224
+	RH850_SYSREG_SELID7 = 256
+
+// RH850 global purpose registers
+
+	RH850_REG_R0 = 0
+	RH850_REG_R1 = 1
+	RH850_REG_R2 = 2
+	RH850_REG_R3 = 3
+	RH850_REG_R4 = 4
+	RH850_REG_R5 = 5
+	RH850_REG_R6 = 6
+	RH850_REG_R7 = 7
+	RH850_REG_R8 = 8
+	RH850_REG_R9 = 9
+	RH850_REG_R10 = 10
+	RH850_REG_R11 = 11
+	RH850_REG_R12 = 12
+	RH850_REG_R13 = 13
+	RH850_REG_R14 = 14
+	RH850_REG_R15 = 15
+	RH850_REG_R16 = 16
+	RH850_REG_R17 = 17
+	RH850_REG_R18 = 18
+	RH850_REG_R19 = 19
+	RH850_REG_R20 = 20
+	RH850_REG_R21 = 21
+	RH850_REG_R22 = 22
+	RH850_REG_R23 = 23
+	RH850_REG_R24 = 24
+	RH850_REG_R25 = 25
+	RH850_REG_R26 = 26
+	RH850_REG_R27 = 27
+	RH850_REG_R28 = 28
+	RH850_REG_R29 = 29
+	RH850_REG_R30 = 30
+	RH850_REG_R31 = 31
+
+// RH850 system registers, selection ID 0
+	RH850_REG_EIPC = 32
+	RH850_REG_EIPSW = 33
+	RH850_REG_FEPC = 34
+	RH850_REG_FEPSW = 35
+	RH850_REG_ECR = 36
+	RH850_REG_PSW = 37
+	RH850_REG_FPSR = 38
+	RH850_REG_FPEPC = 39
+	RH850_REG_FPST = 40
+	RH850_REG_FPCC = 41
+	RH850_REG_FPCFG = 42
+	RH850_REG_FPEC = 43
+	RH850_REG_EIIC = 45
+	RH850_REG_FEIC = 46
+	RH850_REG_CTPC = 48
+	RH850_REG_CTPSW = 49
+	RH850_REG_CTBP = 52
+	RH850_REG_EIWR = 60
+	RH850_REG_FEWR = 61
+	RH850_REG_BSEL = 63
+
+// RH850 system regusters, selection ID 1
+	RH850_REG_MCFG0 = 64
+	RH850_REG_RBASE = 65
+	RH850_REG_EBASE = 66
+	RH850_REG_INTBP = 67
+	RH850_REG_MCTL = 68
+	RH850_REG_PID = 69
+	RH850_REG_SCCFG = 75
+	RH850_REG_SCBP = 76
+
+// RH850 system registers, selection ID 2
+	RH850_REG_HTCFG0 = 96
+	RH850_REG_MEA = 102
+	RH850_REG_ASID = 103
+	RH850_REG_MEI = 104
+	RH850_REG_PC = 288
+	RH850_REG_ENDING = 289
+
+// RH8509 Registers aliases.
+
+	RH850_REG_ZERO = 0
+	RH850_REG_SP = 3
+	RH850_REG_EP = 30
+	RH850_REG_LP = 31
+)