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Add Renesas RH850 architecture support #1918
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Commits on Jan 10, 2024
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Fix RH850 test for 32bits host arch
Damien Cauquil committedJan 10, 2024 Configuration menu - View commit details
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Fix register size for read/write access through unicorn.
Damien Cauquil committedJan 10, 2024 Configuration menu - View commit details
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Remove unicorn deinit in RH850 test code for debugging purpose.
Damien Cauquil committedJan 10, 2024 Configuration menu - View commit details
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Fix a bug in RH850 release function
Damien Cauquil committedJan 10, 2024 Configuration menu - View commit details
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Commits on Jan 19, 2024
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Ported Qemu RH850 architecture to Unicorn (untested code, compilation…
… OK).
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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- Fixed some bugs in unicorn building system - Added RH850 unit test file - Modified instruction decoding routine to handle emulation end address
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Removed hook-related code (causes some issues for now).
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Added RH850 UC_HOOK_CODE support.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Damien Cauquil committed
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Added memory read/write hooks in RH850 sample code.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Backported some bugfixes into Unicorn RH850 implementation.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Fixed som bugs in RH850 sample and changed SP register to be an alias…
… of R3 instead of R2.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Updated python bindings RH850 registers constants
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Updated all RH850 regs constants files.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Removed temporary virtual env.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Damien Cauquil committed
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Update configure script to fix the RH850 architecture defines.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Add msvc target configuration files for RH850 architecture.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Fix default float_status struct initialization.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Removed RH850 from aligned only targets.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Fix RH850 test for 32bits host arch
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Fix register size for read/write access through unicorn.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Remove unicorn deinit in RH850 test code for debugging purpose.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Fix a bug in RH850 release function
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Fix the inconsistencies following the rebase on branch dev.
Damien Cauquil committedJan 19, 2024 Configuration menu - View commit details
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Commits on Jan 22, 2024
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Add Rust and Zig bindings for RH850.
Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Fix insn_in_hook_proxy return type
Luca Gladiator authored and Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Do not search for the RAMBlock in split_region
The MemoryRegion already contains a pointer to the RAMBlock. So it is not necesary to search for it.
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rust only add mmio callback funktion, if callback is requested
The C function uc_mmio_map() allows to add seperate callback functions and userdata for read and write. When the callback functions are NULL unicorn don't try to call this functions. Previous this patch, when i.e. read_callback was None the callback was set to mmio_read_callback_proxy and the userdata was set to NULL. On a callback the mmio_read_callback_proxy then tried to dereference the userdata and caused a segfault. fixes unicorn-engine#1762
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Add arch list feature control in Rust
Signed-off-by: deadash <[email protected]>
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bindings: Rename dotnet project to UnicornEngine
Add a few more properties to prepare a nuget package
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[x86] don't hardcode cpuid results
The cpuid results are set by the selected cpu. CLOSES unicorn-engine#1787
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difference between stop_request and quit_request
quit_request is for internal use. This means the IP register was updated and qemu needs to rebuild the translation blocks. stop_request is set by the user (uc_emu_stop) to indecate that unicorn sould stop emulating.
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* Haiku is fully posix, so can be lumped together with most unix cases
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exclude new binding on rust build
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make unicorn use the physical addresses
This allows to emulate code witch fully uses the MMU. This is necesary to allow full system emulation.
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i386 mmu hack: Allow emulate usermode without mmu
This basicaly mappes virtual addresses to physical addresses 1:1 when the mmu is disabled in the cpu. So you can use the full 64 bit addressspace without required to configure the mmu.
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Some simple tests for diffrent mmu. Basicly add some tlb entries, enable the mmu try to read from virtual address The aarm64 test was provided by imre-kis-arm in unicorn-engine#1718
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i386 call internal helper on special porpese register write
Some registers writes have side effects. i.e. write to cr3 flush the tlb, if the PG bit is set.
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this virtuall tlb allows to use mmu indipendent of the architectur
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Unicorn has included some ugly hacks to provide a envirement where vaddr == paddr. These hacks where to use the full 64 bit mappings on x86 without init the mmu and some memory redirect for MIPS. The UC_TLB_CPU mode defaults to vaddr == paddr, therfor these hacks aren't required anymore.
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clear the TLB cache in uc_ctl_flush_tlb
uc_ctl_flush_tlb implies that the tlb is flushed. This change adds UC_CTL_TLB_FLUSH which clears the TLB and set the uc_ctl_flush_tlb alias to UC_CTL_TLB_FLUSH. Also adds a uc_ctl_flush_tb alias for UC_CTL_TB_FLUSH.
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add How can I interact with MMU/TLB
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Fix clang/mingw - missing getpagesize
Based on msys2-packages patch: msys2/MINGW-packages#10543
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use int128_get64 in memory_unmap
This fixes build errors introduced by bbbc785
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move typedef definition of enum uc_mem_type
forword references to enum types are forbidden in C. Also C++ will not build if this is used
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- Match the types of UC_HOOK_CODE_CB and UC_HOOK_INSN_SYS_CB to C - Avoid building a new namedtuple class in every call to _hook_insn_sys_cb
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Rebuild flags after writing to cp registers
This is buggy as this momemt per unicorn-engine#1789 (comment) We need either doc this or save more information for a context
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load_helper only call cpu_loop_exit() when emulation is running
The load_helper is sometimes called from register writes. When the load fails check if emulation is running before jump out of the emulated code.
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fix UC_MEM_WRITE_PROT callback
callbacks work on the physical address.
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Support demand paging via closures and seh
Reverts 12a7919 which exploits normal tcg mechanism This uses a trampoline to pass extra data to seh handlers
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Revert "Add uc_ctl_get/set_tcg_buffer_size"
This reverts commit 3145e3c because not properly co-authoer-ed.
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Add uc_ctl_get/set_tcg_buffer_size
We still need this API because the virtual memory address space of 32 bits os is only 4GB and we default need 1G per instance Credits to @ZehMatt for original idea Co-authored-by: ζeh Matt <[email protected]>
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Co-authored-by: ζeh Matt <[email protected]>
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Co-authored-by: ζeh Matt <[email protected]>
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Implement uc_reg_{read,write}{,_batch}2 APIs.
These APIs take size parameters, which can be used to properly bounds-check the inputs and outputs for various registers. Additionally, all backends now throw UC_ERR_ARG if the input register numbers are invalid. Completes unicorn-engine#1831.
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Slight refactoring to reduce code duplication.
This also comes with a performance bump due to inlining of reg_read/reg_write (as they're only called once now) and the unlikely() on CHECK_REG_TYPE.
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Simplify reg_read/reg_write, obtaining a perf boost.
Single reg_read/reg_write is now about 25% faster.
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Fix RISCV test_riscv32_fp_move test
RISCV FP registers are 64-bit in size, even in 32-bit mode, because they can hold doubles. The test even uses the double-precision instruction fmv.d. Thus, the reads should be reading 64-bit registers.
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target/i386: Verify memory operand for lcall and ljmp These two opcodes only allow a memory operand. Lacking the check for a register operand, we used the A0 temp without initialization, which led to a tcg abort.
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use address_space_translate to find memory mapping
first version has bugs
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implement simple memory snapshot mechanismus
Uses Copy on Write to make it posible to restore the memory state after a snapshot was made. To restore all MemoryRegions created after the snapshot are removed.
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simple benchmark for the snapshots
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The ram_offset allocator searches the smalest gap in the ram_offset address space. This is slow especialy in combination with many allocation (i.e. snapshots). When it is known that there is no gap, this is now optimized.
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implement uc_mem_unmap with snapshots
still has todos and need tests
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target/i386: fix operand order for PDEP and PEXT For PDEP and PEXT, the mask is provided in the memory (mod+r/m) operand, and therefore is loaded in s->T0 by gen_ldst_modrm. The source is provided in the second source operand (VEX.vvvv) and therefore is loaded in s->T1. Fix the order in which they are passed to the helpers.
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* zig binding - sample added * zig build CI * split mingw (shared/static) CI/CD * unicorn log added * build C/C++ samples
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fix fxsave fpip value, provide tests
Dimitris Glynos authored and Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Fix PPC32 fault when timer-spr access
Access to TB, DEC registers was lead to crash spr_read_decr and others are changed to spr_read_generic spr_write_decr and others are changed to spr_write_generic
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This brings the Java API up to par with Python feature-wise and substantially simplifies the hook implementation, enabling proper bounds-checked hooks. The rewrite strives for compatibility with the previous API, but there are some breaking changes. It is possible to push closer to full backwards compatibility if required, at the cost of reintroducing some of the suboptimal designs. Here are the main points of breakage: - ReadHook and WriteHook are gone, replaced simply by MemHook. Hooking valid memory accesses now requires a type parameter. This enables fetch and read-after hooks with a unified API and a single callback object. - mem_read now takes an int, not a long. We are unable to allocate more than 2GB in a single request anyway (Java limitation). - Instruction hooks now require specifying the instruction explicitly, instead of guessing based on the hook type. This is necessary to distinguish sysenter/syscall and ARM64 mrs/msr/sys/sysl, without excessively bloating the library with redundant hook types. Bounds must also be specified, to support bounds-checked instruction hooks. - Reading object-type registers (any register larger than 64 bits, or registers with special formats) requires a second argument to reg_read. This allows us to provide a fast reg_read that returns a long for the common cases, while still supporting a more general reg_read for other registers. - mem_map_ptr is rewritten to take a *direct* java.nio.Buffer, which enables many more use cases than a simple byte array, and improves performance (a byte array cannot really be used as a mapped buffer without GC-pinning it, which hurts the GC performance). - Context handling API is redesigned to be safer and more object-oriented. A lot of bugs are fixed with this implementation: - Unicorn instances can be properly garbage-collected, instead of hanging around forever in the Unicorn.unicorns table. - Hooks no longer fire outside of their bounds (unicorn-engine#1164), and in fact, hook bounds are properly respected (previously, all hooks were just registered globally to all addresses). - Hooks are substantially faster, as they are now dispatched directly via a single method call rather than being indirected through invokeCallbacks. - Loading vector registers works now, rather than crashing the VM (unicorn-engine#1539). Several features are now enabled in the Java implementation: - All of the current ctl_* calls are implemented. - mmio_map is implemented. - New virtual TLB mode is implemented. - reading/writing Context registers is implemented. - New hook types are added: TcgOpcodeHook, EdgeGeneratedHook, InvalidInstructionHook, TlbFillHook, and the instruction hooks Arm64SysHook, CpuidHook. - All known special registers are supported.
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Reintroduce hook_del(Hook), since it seems useful.
This also improves backwards compatibility a bit.
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Accept unsigned BigIntegers, and produce unsigned BigIntegers by defa…
…ult. Unsigned BigIntegers are a bit more ergonomic, particularly for bitwise operations. reg_write still accepts negative BigIntegers (and will automatically sign extend them), but reg_read will produce unsigned BigIntegers by default.
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Update Java samples to match C samples.
Also add all of the samples as Java tests, referencing the output of the C samples.
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Port sample_batch_reg.c to Java, incidentally finding a bug in the ge…
…neric register implementation.
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Switch to Maven to build the Java bits.
Maven is now used to update the constants, build the Java code, call make to build the native library, and run all the tests. I have removed the "install" and "uninstall" targets; instead, the expectation will be that the JNI library will be placed somewhere on java.library.path and the JAR file will be used as usual (e.g. in a downstream Maven project, or placed on the classpath of your project). Since Maven is now running our tests, this eliminates the need to bundle test dependencies in `testdep`, and makes the project structured more like a typical Java project.
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Switch Java bindings to reg2 API.
This is mostly an extra safety measure; the front-end Unicorn.java should always be sending an appropriately-sized buffer.
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Replace javah by javac -h, only write new constant files if something…
… changes. The const_generator changes help to ensure that e.g. Java rebuilds don't keep rebuilding everything.
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fix cow when using uc_mem_write
memory_cow expect the address and size to be aligned on pagesize.
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fix uc_mem write with cow when using upper half of the address
uc->target_page_align is a uint32_t. When the binary not will only invert the 32 bit of the value. Used this in a binary and operator with a uint64_t will case the upper 32bit of the address to be 0. Therefor the bug only appears when the upper 32bit of the address are used. Now a local uint64_t variable is used for the alignemend and the test uses a not page alligned address which does not fit in 32bit.
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Removed hook-related code (causes some issues for now).
Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Updated all RH850 regs constants files.
Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Fix the inconsistencies following the rebase on branch dev.
Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Add Rust and Zig bindings for RH850.
Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Merge branch 'rh850-arch-fix-ci-new' into rh850-arch
Damien Cauquil committedJan 22, 2024 Configuration menu - View commit details
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Add RH850 constants (mode and arch ID)
Damien Cauquil committedFeb 5, 2024 Configuration menu - View commit details
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Add Rust arch and mode constants.
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Add missing match case in lib.rs for RH850 architecture (get/set PC r…
…egister).
Damien Cauquil committedFeb 12, 2024 Configuration menu - View commit details
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Add missing arch into Cargo.toml and build files.
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Add Rust arch and mode constants.
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Add missing match case in lib.rs for RH850 architecture (get/set PC r…
…egister).
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Add missing arch into Cargo.toml and build files.
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Merge branch 'rh850-arch-ci' into rh850-arch
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Merge branch 'rh850-arch-ci' into rh850-arch
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Fix the TCG code of V850 SETF instruction.
Damien Cauquil committedMar 8, 2024 Configuration menu - View commit details
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