fix(core): fix bootloader update on STM32U5

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trezor · Nov 17, 2023 · 009b9b7 · 009b9b7
1 parent 82b7375
commit 009b9b7
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Showing 5 changed files with 41 additions and 12 deletions.
diff --git a/core/embed/firmware/bl_check.c b/core/embed/firmware/bl_check.c
@@ -217,25 +217,27 @@ void check_and_replace_bootloader(void) {
 
   do {
     uint32_t *p = decomp_out;
-    uint32_t last_whole_word_addr = (((uint32_t)decomp.dest) & ~3);
+    uint32_t last_whole_word_addr = (((uint32_t)decomp.dest) & ~0x7F);
     while ((uint32_t)p < last_whole_word_addr) {
-      ensure(flash_area_write_word(&BOOTLOADER_AREA, offset, *p++), NULL);
-      offset += sizeof(uint32_t);
+      ensure(flash_area_write_burst(&BOOTLOADER_AREA, offset, p), NULL);
+      p += 8 * 4;
+      offset += 8 * 4 * sizeof(uint32_t);
     }
     if ((uint8_t *)p < decomp.dest) {
       // last few bytes in case of unaligned data
-      uint32_t d = 0;
+      uint32_t d[8 * 4] = {0};
       memcpy(&d, p, (uint32_t)decomp.dest - (uint32_t)p);
-      ensure(flash_area_write_word(&BOOTLOADER_AREA, offset, d), NULL);
-      offset += sizeof(uint32_t);
+      ensure(flash_area_write_burst(&BOOTLOADER_AREA, offset, d), NULL);
+      offset += 8 * 4 * sizeof(uint32_t);
     }
     decomp.dest = (uint8_t *)decomp_out;
   } while (uzlib_uncompress(&decomp) >= 0);
 
+  uint32_t d[8 * 4] = {0};
   // fill the rest of the bootloader area with 0x00
   while (offset < bl_len) {
-    ensure(flash_area_write_word(&BOOTLOADER_AREA, offset, 0x00000000), NULL);
-    offset += sizeof(uint32_t);
+    ensure(flash_area_write_burst(&BOOTLOADER_AREA, offset, d), NULL);
+    offset += 8 * 4 * sizeof(uint32_t);
   }
 
   ensure(flash_lock_write(), NULL);

diff --git a/core/embed/firmware/main.c b/core/embed/firmware/main.c
@@ -120,6 +120,10 @@ int main(void) {
 
   display_reinit();
 
+#ifdef USE_DMA2D
+  dma2d_init();
+#endif
+
 #if !defined TREZOR_MODEL_1
   parse_boardloader_capabilities();
 
@@ -130,6 +134,8 @@ int main(void) {
   secbool secret_ok = secret_optiga_extract(secret);
 #endif
 
+  mpu_config_firmware_initial();
+
 #if PRODUCTION || BOOTLOADER_QA
   check_and_replace_bootloader();
 #endif
@@ -140,10 +146,6 @@ int main(void) {
   // Init peripherals
   pendsv_init();
 
-#ifdef USE_DMA2D
-  dma2d_init();
-#endif
-
   fault_handlers_init();
 
 #if defined TREZOR_MODEL_T

diff --git a/core/embed/trezorhal/mpu.h b/core/embed/trezorhal/mpu.h
@@ -23,6 +23,7 @@
 void mpu_config_off(void);
 void mpu_config_boardloader(void);
 void mpu_config_bootloader(void);
+void mpu_config_firmware_initial(void);
 void mpu_config_firmware(void);
 void mpu_config_prodtest(void);
 

diff --git a/core/embed/trezorhal/stm32f4/mpu.c b/core/embed/trezorhal/stm32f4/mpu.c
@@ -104,6 +104,8 @@ void mpu_config_bootloader(void) {
   HAL_MPU_Enable(LL_MPU_CTRL_HARDFAULT_NMI);
 }
 
+void mpu_config_firmware_initial(void) {}
+
 void mpu_config_firmware(void) {
   // Disable MPU
   HAL_MPU_Disable();

diff --git a/core/embed/trezorhal/stm32u5/mpu.c b/core/embed/trezorhal/stm32u5/mpu.c
@@ -134,6 +134,7 @@ static void mpu_set_attributes() {
 #define L2_REST_SIZE \
   (FLASH_SIZE - (BOOTLOADER_SIZE + BOARDLOADER_SIZE + SECRET_SIZE))
 
+#define L3_PREV_SIZE_BLD (STORAGE_SIZE + BOOTLOADER_SIZE)
 #define L3_PREV_SIZE (STORAGE_SIZE)
 #define L3_REST_START (FIRMWARE_START + FIRMWARE_SIZE)
 #define L3_REST_SIZE                                                   \
@@ -182,6 +183,27 @@ void mpu_config_bootloader() {
   HAL_MPU_Enable(LL_MPU_CTRL_HARDFAULT_NMI);
 }
 
+void mpu_config_firmware_initial() {
+  HAL_MPU_Disable();
+  mpu_set_attributes();
+  // clang-format off
+  //   REGION    ADDRESS                   SIZE                TYPE       WRITE   UNPRIV
+  SET_REGION( 0, BOOTLOADER_START,         L3_PREV_SIZE_BLD,   FLASH_DATA,  YES,   YES ); // Bootloader + Storage
+  SET_REGION( 1, FIRMWARE_START,           FIRMWARE_SIZE,      FLASH_CODE,   NO,   YES ); // Firmware
+  SET_REGION( 2, L3_REST_START,            L3_REST_SIZE,       FLASH_DATA,  YES,   YES ); // Reserve
+  SET_REGION( 3, SRAM1_BASE_S,             SRAM_SIZE,          SRAM,        YES,   YES ); // SRAM1/2/3/5
+#if defined STM32U5A9xx || defined STM32U5G9xx
+  SET_REGION( 4, GFXMMU_BUFFERS_S,         SIZE_16M,           SRAM,        YES,   YES ); // Frame buffer
+#else
+  DIS_REGION( 4 );
+#endif
+  SET_REGION( 5, PERIPH_BASE_S,            SIZE_256M,          PERIPHERAL,  YES,   YES ); // Peripherals
+  SET_REGION( 6, FLASH_OTP_BASE,           FLASH_OTP_SIZE,     FLASH_DATA,  YES,   YES ); // OTP
+  DIS_REGION( 7 );
+  // clang-format on
+  HAL_MPU_Enable(LL_MPU_CTRL_HARDFAULT_NMI);
+}
+
 void mpu_config_firmware() {
   HAL_MPU_Disable();
   mpu_set_attributes();