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feat(core): add support for STM32U585
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@TychoVrahe
TychoVrahe committed Nov 17, 2023
1 parent 0cd0965 commit 82b7375
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Showing 9 changed files with 651 additions and 33 deletions.
109 changes: 109 additions & 0 deletions core/embed/boardloader/memory_stm32u58.ld
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/* Trezor v2 boardloader linker script */

ENTRY(reset_handler)

MEMORY {
FLASH (rx) : ORIGIN = 0x0C004000, LENGTH = 48K
SRAM1 (wal) : ORIGIN = 0x30000000, LENGTH = 192K - 0x100
BOOT_ARGS (wal) : ORIGIN = 0x3002FF00, LENGTH = 0x100
SRAM2 (wal) : ORIGIN = 0x30030000, LENGTH = 64K
SRAM3 (wal) : ORIGIN = 0x30040000, LENGTH = 512K
SRAM5 (wal) : ORIGIN = 0x30080000, LENGTH = 0K /* SRAM5 is not available */
SRAM6 (wal) : ORIGIN = 0x30080000, LENGTH = 0K /* SRAM6 is not available */
SRAM4 (wal) : ORIGIN = 0x38000000, LENGTH = 16K
}

main_stack_base = ORIGIN(SRAM2) + SIZEOF(.stack); /* 8-byte aligned full descending stack */
_sstack = ORIGIN(SRAM2);
_estack = main_stack_base;

/* used by the startup code to populate variables used by the C code */
data_lma = LOADADDR(.data);
data_vma = ADDR(.data);
data_size = SIZEOF(.data);

/* used by the startup code to populate variables used by the C code */
sensitive_lma = LOADADDR(.sensitive);
sensitive_vma = ADDR(.sensitive);
sensitive_size = SIZEOF(.sensitive);

/* used by the startup code to wipe memory */
sram1_start = ORIGIN(SRAM1);
sram1_end = ORIGIN(SRAM1) + LENGTH(SRAM1);
sram2_start = ORIGIN(SRAM2);
sram2_end = ORIGIN(SRAM2) + LENGTH(SRAM2);
sram3_start = ORIGIN(SRAM3);
sram3_end = ORIGIN(SRAM3) + LENGTH(SRAM3);
sram4_start = ORIGIN(SRAM4);
sram4_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
sram5_start = ORIGIN(SRAM5);
sram5_end = ORIGIN(SRAM5) + LENGTH(SRAM5);
sram6_start = ORIGIN(SRAM6);
sram6_end = ORIGIN(SRAM6) + LENGTH(SRAM6);

/* reserve 256 bytes for bootloader arguments */
boot_args_start = ORIGIN(BOOT_ARGS);
boot_args_end = ORIGIN(BOOT_ARGS) + LENGTH(BOOT_ARGS);

SECTIONS {
.vector_table : ALIGN(512) {
KEEP(*(.vector_table));
} >FLASH AT>FLASH

.text : ALIGN(4) {
*(.text*);
. = ALIGN(4); /* make the section size a multiple of the word size */
} >FLASH AT>FLASH

.rodata : ALIGN(4) {
*(.rodata*);
. = ALIGN(4); /* make the section size a multiple of the word size */
} >FLASH AT>FLASH

.data : ALIGN(4) {
*(.data*);
. = ALIGN(8);
} >SRAM1 AT>FLASH

/DISCARD/ : {
*(.ARM.exidx*);
}

.bss : ALIGN(4) {
*(.bss*);
. = ALIGN(4);
} >SRAM1

.buf : ALIGN(4) {
*(.buf*);
. = ALIGN(4);
} >SRAM1

.stack : ALIGN(8) {
. = 16K; /* Overflow causes UsageFault */
} >SRAM2

.sensitive : ALIGN(8) {
*(.sensitive*);
. = ALIGN(4);
} >SRAM2 AT>FLASH

.fb : ALIGN(4) {
__fb_start = .;
*(.fb1*);
*(.fb2*);
__fb_end = .;
. = ALIGN(4);
} >SRAM3

.boot_args : ALIGN(8) {
*(.boot_command*);
. = ALIGN(8);
*(.boot_args*);
. = ALIGN(8);
} >BOOT_ARGS


/* Hard-coded address for capabilities structure */
.capabilities 0x0C00FF00 : {KEEP(*(.capabilities_section))}
}
106 changes: 106 additions & 0 deletions core/embed/bootloader/memory_stm32u58.ld
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/* Trezor v2 bootloader linker script */

ENTRY(reset_handler)

MEMORY {
FLASH (rx) : ORIGIN = 0x0C010000, LENGTH = 128K
SRAM1 (wal) : ORIGIN = 0x30000000, LENGTH = 192K - 0x100
BOOT_ARGS (wal) : ORIGIN = 0x3002FF00, LENGTH = 0x100
SRAM2 (wal) : ORIGIN = 0x30030000, LENGTH = 64K
SRAM3 (wal) : ORIGIN = 0x30040000, LENGTH = 512K
SRAM5 (wal) : ORIGIN = 0x30080000, LENGTH = 0K /* SRAM5 is not available */
SRAM6 (wal) : ORIGIN = 0x30080000, LENGTH = 0K /* SRAM6 is not available */
SRAM4 (wal) : ORIGIN = 0x38000000, LENGTH = 16K
}

main_stack_base = ORIGIN(SRAM2) + SIZEOF(.stack); /* 8-byte aligned full descending stack */
_sstack = ORIGIN(SRAM2);
_estack = main_stack_base;

/* used by the startup code to populate variables used by the C code */
data_lma = LOADADDR(.data);
data_vma = ADDR(.data);
data_size = SIZEOF(.data);

/* used by the startup code to populate variables used by the C code */
sensitive_lma = LOADADDR(.sensitive);
sensitive_vma = ADDR(.sensitive);
sensitive_size = SIZEOF(.sensitive);

/* used by the startup code to wipe memory */
sram1_start = ORIGIN(SRAM1);
sram1_end = ORIGIN(SRAM1) + LENGTH(SRAM1);
sram2_start = ORIGIN(SRAM2);
sram2_end = ORIGIN(SRAM2) + LENGTH(SRAM2);
sram3_start = ORIGIN(SRAM3);
sram3_end = ORIGIN(SRAM3) + LENGTH(SRAM3);
sram4_start = ORIGIN(SRAM4);
sram4_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
sram5_start = ORIGIN(SRAM5);
sram5_end = ORIGIN(SRAM5) + LENGTH(SRAM5);
sram6_start = ORIGIN(SRAM6);
sram6_end = ORIGIN(SRAM6) + LENGTH(SRAM6);

/* reserve 256 bytes for bootloader arguments */
boot_args_start = ORIGIN(BOOT_ARGS);
boot_args_end = ORIGIN(BOOT_ARGS) + LENGTH(BOOT_ARGS);

_codelen = SIZEOF(.flash) + SIZEOF(.data) + SIZEOF(.sensitive);

SECTIONS {
.header : ALIGN(4) {
KEEP(*(.header));
} >FLASH AT>FLASH

.flash : ALIGN(512) {
KEEP(*(.vector_table));
. = ALIGN(4);
*(.text*);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(512);
} >FLASH AT>FLASH

.data : ALIGN(4) {
*(.data*);
. = ALIGN(512);
} >SRAM1 AT>FLASH

/DISCARD/ : {
*(.ARM.exidx*);
}

.bss : ALIGN(4) {
*(.bss*);
. = ALIGN(4);
} >SRAM1

.buf : ALIGN(4) {
*(.buf*);
. = ALIGN(4);
} >SRAM1

.stack : ALIGN(8) {
. = 16K; /* Overflow causes UsageFault */
} >SRAM2

.sensitive : ALIGN(512) {
*(.sensitive*);
. = ALIGN(512);
} >SRAM2 AT>FLASH

.fb : ALIGN(4) {
__fb_start = .;
*(.fb1*);
*(.fb2*);
__fb_end = .;
. = ALIGN(4);
} >SRAM3

.boot_args : ALIGN(8) {
*(.boot_command*);
. = ALIGN(8);
*(.boot_args*);
. = ALIGN(8);
} >BOOT_ARGS
}
106 changes: 106 additions & 0 deletions core/embed/bootloader_ci/memory_stm32u58.ld
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/* Trezor v2 bootloader linker script */

ENTRY(reset_handler)

MEMORY {
FLASH (rx) : ORIGIN = 0x0C010000, LENGTH = 128K
SRAM1 (wal) : ORIGIN = 0x30000000, LENGTH = 192K - 0x100
BOOT_ARGS (wal) : ORIGIN = 0x3002FF00, LENGTH = 0x100
SRAM2 (wal) : ORIGIN = 0x30030000, LENGTH = 64K
SRAM3 (wal) : ORIGIN = 0x30040000, LENGTH = 512K
SRAM5 (wal) : ORIGIN = 0x30080000, LENGTH = 0K /* SRAM5 is not available */
SRAM6 (wal) : ORIGIN = 0x30080000, LENGTH = 0K /* SRAM6 is not available */
SRAM4 (wal) : ORIGIN = 0x38000000, LENGTH = 16K
}

main_stack_base = ORIGIN(SRAM2) + SIZEOF(.stack); /* 8-byte aligned full descending stack */
_sstack = ORIGIN(SRAM2);
_estack = main_stack_base;

/* used by the startup code to populate variables used by the C code */
data_lma = LOADADDR(.data);
data_vma = ADDR(.data);
data_size = SIZEOF(.data);

/* used by the startup code to populate variables used by the C code */
sensitive_lma = LOADADDR(.sensitive);
sensitive_vma = ADDR(.sensitive);
sensitive_size = SIZEOF(.sensitive);

/* used by the startup code to wipe memory */
sram1_start = ORIGIN(SRAM1);
sram1_end = ORIGIN(SRAM1) + LENGTH(SRAM1);
sram2_start = ORIGIN(SRAM2);
sram2_end = ORIGIN(SRAM2) + LENGTH(SRAM2);
sram3_start = ORIGIN(SRAM3);
sram3_end = ORIGIN(SRAM3) + LENGTH(SRAM3);
sram4_start = ORIGIN(SRAM4);
sram4_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
sram5_start = ORIGIN(SRAM5);
sram5_end = ORIGIN(SRAM5) + LENGTH(SRAM5);
sram6_start = ORIGIN(SRAM6);
sram6_end = ORIGIN(SRAM6) + LENGTH(SRAM6);

/* reserve 256 bytes for bootloader arguments */
boot_args_start = ORIGIN(BOOT_ARGS);
boot_args_end = ORIGIN(BOOT_ARGS) + LENGTH(BOOT_ARGS);

_codelen = SIZEOF(.flash) + SIZEOF(.data) + SIZEOF(.sensitive);

SECTIONS {
.header : ALIGN(4) {
KEEP(*(.header));
} >FLASH AT>FLASH

.flash : ALIGN(512) {
KEEP(*(.vector_table));
. = ALIGN(4);
*(.text*);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(512);
} >FLASH AT>FLASH

.data : ALIGN(4) {
*(.data*);
. = ALIGN(512);
} >SRAM1 AT>FLASH

/DISCARD/ : {
*(.ARM.exidx*);
}

.bss : ALIGN(4) {
*(.bss*);
. = ALIGN(4);
} >SRAM1

.buf : ALIGN(4) {
*(.buf*);
. = ALIGN(4);
} >SRAM1

.stack : ALIGN(8) {
. = 16K; /* Exactly 16K allocated for stack. Overflow causes Usage fault. */
} >SRAM2

.sensitive : ALIGN(512) {
*(.sensitive*);
. = ALIGN(512);
} >SRAM2 AT>FLASH

.fb : ALIGN(4) {
__fb_start = .;
*(.fb1*);
*(.fb2*);
__fb_end = .;
. = ALIGN(4);
} >SRAM3

.boot_args : ALIGN(8) {
*(.boot_command*);
. = ALIGN(8);
*(.boot_args*);
. = ALIGN(8);
} >BOOT_ARGS
}
22 changes: 22 additions & 0 deletions core/embed/lib/sizedefs.h
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@@ -0,0 +1,22 @@
#ifndef SIZEDEFS_H_
#define SIZEDEFS_H_

#define SIZE_16K (16 * 1024)
#define SIZE_48K (48 * 1024)
#define SIZE_64K (64 * 1024)
#define SIZE_128K (128 * 1024)
#define SIZE_192K (192 * 1024)
#define SIZE_256K (256 * 1024)
#define SIZE_320K (320 * 1024)
#define SIZE_768K (768 * 1024)
#define SIZE_2496K (2496 * 1024)
#define SIZE_3712K ((4096 - 384) * 1024)
#define SIZE_3776K ((4096 - 320) * 1024)
#define SIZE_3904K ((4096 - 192) * 1024)
#define SIZE_4032K ((4096 - 64) * 1024)
#define SIZE_2M (2 * 1024 * 1024)
#define SIZE_4M (4 * 1024 * 1024)
#define SIZE_16M (16 * 1024 * 1024)
#define SIZE_256M (256 * 1024 * 1024)

#endif
10 changes: 6 additions & 4 deletions core/embed/models/model_D002.h
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Original file line number Diff line number Diff line change
@@ -1,6 +1,8 @@
#ifndef MODELS_MODEL_DISC2_H_
#define MODELS_MODEL_DISC2_H_

#include "sizedefs.h"

#define MODEL_NAME "T"
#define MODEL_FULL_NAME "Trezor Model T"
#define MODEL_INTERNAL_NAME "D002"
Expand All @@ -24,9 +26,9 @@
#define BOOTLOADER_START 0x0C010000
#define FIRMWARE_START 0x0C050000

#define IMAGE_CHUNK_SIZE (256 * 1024)
#define BOOTLOADER_IMAGE_MAXSIZE (128 * 1024 * 1) // 128 KB
#define FIRMWARE_IMAGE_MAXSIZE (128 * 1024 * 13) // 1664 KB
#define NORCOW_SECTOR_SIZE (64 * 1024)
#define IMAGE_CHUNK_SIZE SIZE_256K
#define BOOTLOADER_IMAGE_MAXSIZE SIZE_128K
#define FIRMWARE_IMAGE_MAXSIZE SIZE_3712K
#define NORCOW_SECTOR_SIZE SIZE_64K

#endif
2 changes: 1 addition & 1 deletion core/embed/models/model_D002_layout.c
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ const flash_area_t FIRMWARE_AREA = {
.subarea[0] =
{
.first_sector = 0x28,
.num_sectors = 456,
.num_sectors = 464,
},
};

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