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    • Documentation for the tinyNX33U SoM and related boards
      Verilog
      Other
      4640Updated Nov 30, 2024Nov 30, 2024
    • zephyr

      Public
      Public fork of Zephyr, with the code imported from zephyr_private
      C
      Apache License 2.0
      6.7k002Updated Nov 29, 2024Nov 29, 2024
    • Zephyr running on the tinyCLUNX33 SoM
      C
      1200Updated Nov 29, 2024Nov 29, 2024
    • pico2-ice

      Public
      MIT License
      2200Updated Nov 25, 2024Nov 25, 2024
    • Firmware and software support for the pico-ice board
      C
      MIT License
      154952Updated Nov 24, 2024Nov 24, 2024
    • pico-ice

      Public
      Raspberry Pi PICO board + Lattice iCE40 FPGA's
      HTML
      MIT License
      2515631Updated Nov 2, 2024Nov 2, 2024
    • C++
      0000Updated Jul 12, 2024Jul 12, 2024
    • uf2-utils

      Public
      C
      MIT License
      1000Updated Jul 11, 2024Jul 11, 2024
    • UPduino 3.0: new 4 layer layout, various other improvements
      HTML
      MIT License
      39330181Updated Jul 6, 2024Jul 6, 2024
    • LiteX boards files
      Python
      BSD 2-Clause "Simplified" License
      289201Updated Jun 26, 2024Jun 26, 2024
    • Hacking FPV cameras
      MIT License
      0000Updated Jun 1, 2023Jun 1, 2023
    • C
      MIT License
      0000Updated Mar 22, 2023Mar 22, 2023
    • FPGA RTL code for the pico-ice board
      MIT License
      0100Updated Dec 2, 2022Dec 2, 2022
    • Making Lattice SensAI work properly on tinyVision products
      Verilog
      Other
      411115Updated Nov 22, 2022Nov 22, 2022
    • SystemVerilog
      84200Updated Sep 22, 2022Sep 22, 2022
    • tinyVision blogs on Github pages
      HTML
      MIT License
      0000Updated Jan 2, 2022Jan 2, 2022
    • UPduino Himax adapter
      MIT License
      1000Updated Oct 23, 2021Oct 23, 2021
    • tinyVision.ai Vision & Sensor FPGA System on Module
      Verilog
      MIT License
      124400Updated Jun 23, 2021Jun 23, 2021
    • spi_slave

      Public
      SPI Slave for the UPduino and other FPGA's, includes a SPI Slave to 32 bit Wishbone master core.
      SystemVerilog
      Other
      2200Updated Mar 3, 2021Mar 3, 2021
    • Power analysis of the ICE40UP5K-SG48 devices
      Verilog
      MIT License
      32200Updated Sep 26, 2020Sep 26, 2020
    • upmicro

      Public
      MIT License
      1400Updated Sep 4, 2020Sep 4, 2020
    • ARMistiCE

      Public
      ARM + iCE40 open source compute platform
      Apache License 2.0
      0310Updated Apr 7, 2020Apr 7, 2020
    • UPduino
      Verilog
      MIT License
      82630Updated Mar 30, 2020Mar 30, 2020
    • apio

      Public
      🌱 Open source ecosystem for open FPGA boards
      Python
      GNU General Public License v2.0
      139100Updated Mar 30, 2020Mar 30, 2020
    • An open source USB bootloader for FPGAs
      AGS Script
      Apache License 2.0
      94100Updated Jan 14, 2020Jan 14, 2020
    • Landing page for tinyVision.ai Inc.
      HTML
      MIT License
      1.2k000Updated Aug 14, 2019Aug 14, 2019
    • wb_bfm

      Public
      Wishbone Bus Functional Model
      Verilog
      5200Updated Apr 27, 2017Apr 27, 2017