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Generated STM32 targets with FPU #255

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merged 3 commits into from
Oct 20, 2024
Merged

Generated STM32 targets with FPU #255

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c64eb50
add m7f and m33f targets, change m7(non-f) to use soft float abi.
Copper280z Oct 10, 2024
839f0de
add logic for specifying the 'f' version of a target cpu if the core …
Copper280z Oct 10, 2024
1b791b3
fix parts db decl handling
mattnite Oct 20, 2024
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3 changes: 3 additions & 0 deletions build.zig
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Original file line number Diff line number Diff line change
Expand Up @@ -97,6 +97,9 @@ fn generate_parts_db(b: *Build) !Build.LazyPath {
inline for (ports) |port| {
const chips_start_idx = chips.items.len;
inline for (@typeInfo(@field(port[1], "chips")).Struct.decls) |decl| {
if (@typeInfo(@TypeOf(@field(@field(port[1], "chips"), decl.name))) != .Struct)
continue;

const target = @field(@field(port[1], "chips"), decl.name);
try chips.append(.{
.identifier = decl.name,
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24 changes: 23 additions & 1 deletion core/build.zig
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Expand Up @@ -79,6 +79,18 @@ pub const cpus = struct {
},
};

pub const cortex_m33f = MicroZig.Cpu{
.name = "ARM Cortex-M33F",
.root_source_file = .{ .cwd_relative = build_root ++ "/src/cpus/cortex_m.zig" },
.target = std.Target.Query{
.cpu_arch = .thumb,
.cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m33 },
.cpu_features_add = std.Target.arm.featureSet(&.{.vfp4d16sp}),
.os_tag = .freestanding,
.abi = .eabihf,
},
};

pub const cortex_m4 = MicroZig.Cpu{
.name = "ARM Cortex-M4",
.root_source_file = .{ .cwd_relative = build_root ++ "/src/cpus/cortex_m.zig" },
Expand Down Expand Up @@ -109,10 +121,20 @@ pub const cpus = struct {
.cpu_arch = .thumb,
.cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m7 },
.os_tag = .freestanding,
.abi = .eabi,
},
};
pub const cortex_m7f = MicroZig.Cpu{
.name = "ARM Cortex-M7F",
.root_source_file = .{ .cwd_relative = build_root ++ "/src/cpus/cortex_m.zig" },
.target = std.zig.CrossTarget{
.cpu_arch = .thumb,
.cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m7 },
.cpu_features_add = std.Target.arm.featureSet(&.{.fp_armv8d16sp}),
.os_tag = .freestanding,
.abi = .eabihf,
},
};

pub const riscv32_imac = MicroZig.Cpu{
.name = "RISC-V 32-bit",
.root_source_file = .{ .cwd_relative = build_root ++ "/src/cpus/riscv32.zig" },
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