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This PR adds some logic to use the floating point version of a target if the core has an interrupt labeled "FPU". It also adds a target with the FPU features set and hard float abi for the M33 and M7 cores, and for the non-f M7 it sets the soft float abi.
Also makes the register defs path public in chips.zig so a user can specify their own target but still use the generated registers if they need to for whatever reason.
Addresses #245 (comment)