drivers: i3c: Support I3C driver for STM32.

This commit introduces support for the I3C driver on STM32, enabling functionality APIs for I3C controllers.

Signed-off-by: EXALT Technologies <[email protected]>

boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi

@@ -78,6 +78,14 @@
 	status = "okay";
 };
 
+&i3c1 {
+	pinctrl-0 =  <&i3c1_scl_pd12 &i3c1_sda_pd13>;
+	pinctrl-names = "default";
+	i3c-scl-hz = <12500000>;
+	i2c-scl-hz = <400000>;
+	status = "okay";
+};
+
 &rcc {
 	clocks = <&pll>;
 	clock-frequency = <DT_FREQ_M(240)>;

boards/st/nucleo_h563zi/nucleo_h563zi.yaml

@@ -25,4 +25,5 @@ supported:
   - usb_device
   - rtc
   - i2c
+  - i3c
 vendor: st

drivers/i3c/CMakeLists.txt

@@ -41,6 +41,11 @@ zephyr_library_sources_ifdef(
   i3c_npcx.c
 )
 
+zephyr_library_sources_ifdef(
+  CONFIG_I3C_STM32
+  i3c_stm32.c
+)
+
 zephyr_library_sources_ifdef(
   CONFIG_I3C_TEST
   i3c_test.c

drivers/i3c/Kconfig

@@ -118,5 +118,6 @@ rsource "Kconfig.nxp"
 rsource "Kconfig.cdns"
 rsource "Kconfig.npcx"
 rsource "Kconfig.test"
+rsource "Kconfig.stm32"
 
 endif # I3C

drivers/i3c/Kconfig.stm32

@@ -0,0 +1,41 @@
+# Copyright (c) 2024 Your Company
+#
+# SPDX-License-Identifier: Apache-2.0
+
+DT_COMPAT_STM32_I3C := st,stm32-i3c
+module = I3C_STM32
+module-str = i3c_stm32
+
+source "subsys/logging/Kconfig.template.log_config"
+config I3C_STM32
+		bool "STM32 I3C driver support"
+		depends on DT_HAS_ST_STM32_I3C_ENABLED
+		select USE_STM32_HAL_I3C
+		default y
+		help
+			Enable support for I3C on STM32 microcontrollers.
+
+config I3C_STM32_POLL
+		bool "I3C polling mode for STM32"
+		depends on I3C_STM32
+		default n
+		help
+			Enables polling mode for I3C on STM32 microcontrollers.
+
+config I3C_STM32_DMA
+		bool "STM32 I3C DMA driver support"
+		depends on I3C_STM32 && DMA_STM32U5 && !I3C_STM32_POLL
+		help
+			Enables support for I3C DMA mode on STM32 microcontrollers.
+			This option is incompatible with I3C_STM32_POLL
+
+config I3C_STM32_DMA_FIFO_HEAP_SIZE
+		int "Status FIFO and control FIFO heap"
+		depends on I3C_STM32_DMA
+		default 2048
+		help
+			Configures the heap size for dynamically allocating the regions for
+			storing status FIFO and control FIFO words which will be used by the DMA.
+			This value depends on the maximum number of messages that will be sent
+			during a single transfer. 2KB guarantees enough heap size for sending 256
+			messages on a single transfer.