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rust-tests: Some RISC-V emulation tests #1988

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rust-tests: Some RISC-V emulation tests #1988

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Commits on Aug 26, 2024

  1. rust-tests: Some RISC-V emulation tests 

    There were previously no RISC-V emulation tests at all.

Now there is a happy-path test of successfully executing a single
instruction, along with two different ways of hooking an invalid
instruction (using either general interrupt hook or invalid instruction
hook) and also using general interrupt hook to handle an ecall instruction.
    @apparentlymart
    apparentlymart committed Aug 26, 2024
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  2. rust-tests: handling of RISC-V memory access errors

    @apparentlymart
    apparentlymart committed Aug 26, 2024
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  3. rust-tests: Don't use virtual TLB mode in the memory error tests 

    A TLB miss in virtual TLB mode causes Err(EXCEPTION) to be returned
immediately, without calling any hooks or giving the target-specific code
a chance to emulate a page fault exception.

Therefore this now tests in the default TLB mode that uses target-specific
TLB building logic.
    @apparentlymart
    apparentlymart committed Aug 26, 2024
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