-
Notifications
You must be signed in to change notification settings - Fork 1.3k
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
bindings: regenerate constants for AVR support.
Signed-off-by: Glenn Baker <[email protected]>
- Loading branch information
Showing
13 changed files
with
924 additions
and
7 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,155 @@ | ||
// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT | ||
|
||
namespace UnicornEngine.Const | ||
|
||
open System | ||
|
||
[<AutoOpen>] | ||
module AVR = | ||
|
||
// AVR architectures | ||
let UC_AVR_ARCH_AVR1 = 10 | ||
let UC_AVR_ARCH_AVR2 = 20 | ||
let UC_AVR_ARCH_AVR25 = 25 | ||
let UC_AVR_ARCH_AVR3 = 30 | ||
let UC_AVR_ARCH_AVR4 = 40 | ||
let UC_AVR_ARCH_AVR5 = 50 | ||
let UC_AVR_ARCH_AVR51 = 51 | ||
let UC_AVR_ARCH_AVR6 = 60 | ||
let UC_CPU_AVR_ARCH = 1000 | ||
|
||
// AVR CPU | ||
let UC_CPU_AVR_ATMEGA16 = 50016 | ||
let UC_CPU_AVR_ATMEGA32 = 50032 | ||
let UC_CPU_AVR_ATMEGA64 = 50064 | ||
let UC_CPU_AVR_ATMEGA128 = 51128 | ||
let UC_CPU_AVR_ATMEGA128RFR2 = 51129 | ||
let UC_CPU_AVR_ATMEGA1280 = 51130 | ||
let UC_CPU_AVR_ATMEGA256 = 60256 | ||
let UC_CPU_AVR_ATMEGA256RFR2 = 60257 | ||
let UC_CPU_AVR_ATMEGA2560 = 60258 | ||
|
||
// AVR memory | ||
let UC_AVR_MEM_FLASH = 134217728 | ||
|
||
// AVR registers | ||
|
||
let UC_AVR_REG_INVALID = 0 | ||
let UC_AVR_REG_R0 = 1 | ||
let UC_AVR_REG_R1 = 2 | ||
let UC_AVR_REG_R2 = 3 | ||
let UC_AVR_REG_R3 = 4 | ||
let UC_AVR_REG_R4 = 5 | ||
let UC_AVR_REG_R5 = 6 | ||
let UC_AVR_REG_R6 = 7 | ||
let UC_AVR_REG_R7 = 8 | ||
let UC_AVR_REG_R8 = 9 | ||
let UC_AVR_REG_R9 = 10 | ||
let UC_AVR_REG_R10 = 11 | ||
let UC_AVR_REG_R11 = 12 | ||
let UC_AVR_REG_R12 = 13 | ||
let UC_AVR_REG_R13 = 14 | ||
let UC_AVR_REG_R14 = 15 | ||
let UC_AVR_REG_R15 = 16 | ||
let UC_AVR_REG_R16 = 17 | ||
let UC_AVR_REG_R17 = 18 | ||
let UC_AVR_REG_R18 = 19 | ||
let UC_AVR_REG_R19 = 20 | ||
let UC_AVR_REG_R20 = 21 | ||
let UC_AVR_REG_R21 = 22 | ||
let UC_AVR_REG_R22 = 23 | ||
let UC_AVR_REG_R23 = 24 | ||
let UC_AVR_REG_R24 = 25 | ||
let UC_AVR_REG_R25 = 26 | ||
let UC_AVR_REG_R26 = 27 | ||
let UC_AVR_REG_R27 = 28 | ||
let UC_AVR_REG_R28 = 29 | ||
let UC_AVR_REG_R29 = 30 | ||
let UC_AVR_REG_R30 = 31 | ||
let UC_AVR_REG_R31 = 32 | ||
let UC_AVR_REG_PC = 33 | ||
let UC_AVR_REG_SP = 34 | ||
let UC_AVR_REG_RAMPD = 57 | ||
let UC_AVR_REG_RAMPX = 58 | ||
let UC_AVR_REG_RAMPY = 59 | ||
let UC_AVR_REG_RAMPZ = 60 | ||
let UC_AVR_REG_EIND = 61 | ||
let UC_AVR_REG_SPL = 62 | ||
let UC_AVR_REG_SPH = 63 | ||
let UC_AVR_REG_SREG = 64 | ||
|
||
// 16-bit coalesced registers | ||
let UC_AVR_REG_R0W = 65 | ||
let UC_AVR_REG_R1W = 66 | ||
let UC_AVR_REG_R2W = 67 | ||
let UC_AVR_REG_R3W = 68 | ||
let UC_AVR_REG_R4W = 69 | ||
let UC_AVR_REG_R5W = 70 | ||
let UC_AVR_REG_R6W = 71 | ||
let UC_AVR_REG_R7W = 72 | ||
let UC_AVR_REG_R8W = 73 | ||
let UC_AVR_REG_R9W = 74 | ||
let UC_AVR_REG_R10W = 75 | ||
let UC_AVR_REG_R11W = 76 | ||
let UC_AVR_REG_R12W = 77 | ||
let UC_AVR_REG_R13W = 78 | ||
let UC_AVR_REG_R14W = 79 | ||
let UC_AVR_REG_R15W = 80 | ||
let UC_AVR_REG_R16W = 81 | ||
let UC_AVR_REG_R17W = 82 | ||
let UC_AVR_REG_R18W = 83 | ||
let UC_AVR_REG_R19W = 84 | ||
let UC_AVR_REG_R20W = 85 | ||
let UC_AVR_REG_R21W = 86 | ||
let UC_AVR_REG_R22W = 87 | ||
let UC_AVR_REG_R23W = 88 | ||
let UC_AVR_REG_R24W = 89 | ||
let UC_AVR_REG_R25W = 90 | ||
let UC_AVR_REG_R26W = 91 | ||
let UC_AVR_REG_R27W = 92 | ||
let UC_AVR_REG_R28W = 93 | ||
let UC_AVR_REG_R29W = 94 | ||
let UC_AVR_REG_R30W = 95 | ||
|
||
// 32-bit coalesced registers | ||
let UC_AVR_REG_R0D = 97 | ||
let UC_AVR_REG_R1D = 98 | ||
let UC_AVR_REG_R2D = 99 | ||
let UC_AVR_REG_R3D = 100 | ||
let UC_AVR_REG_R4D = 101 | ||
let UC_AVR_REG_R5D = 102 | ||
let UC_AVR_REG_R6D = 103 | ||
let UC_AVR_REG_R7D = 104 | ||
let UC_AVR_REG_R8D = 105 | ||
let UC_AVR_REG_R9D = 106 | ||
let UC_AVR_REG_R10D = 107 | ||
let UC_AVR_REG_R11D = 108 | ||
let UC_AVR_REG_R12D = 109 | ||
let UC_AVR_REG_R13D = 110 | ||
let UC_AVR_REG_R14D = 111 | ||
let UC_AVR_REG_R15D = 112 | ||
let UC_AVR_REG_R16D = 113 | ||
let UC_AVR_REG_R17D = 114 | ||
let UC_AVR_REG_R18D = 115 | ||
let UC_AVR_REG_R19D = 116 | ||
let UC_AVR_REG_R20D = 117 | ||
let UC_AVR_REG_R21D = 118 | ||
let UC_AVR_REG_R22D = 119 | ||
let UC_AVR_REG_R23D = 120 | ||
let UC_AVR_REG_R24D = 121 | ||
let UC_AVR_REG_R25D = 122 | ||
let UC_AVR_REG_R26D = 123 | ||
let UC_AVR_REG_R27D = 124 | ||
let UC_AVR_REG_R28D = 125 | ||
|
||
// Alias registers | ||
let UC_AVR_REG_Xhi = 28 | ||
let UC_AVR_REG_Xlo = 27 | ||
let UC_AVR_REG_Yhi = 30 | ||
let UC_AVR_REG_Ylo = 29 | ||
let UC_AVR_REG_Zhi = 32 | ||
let UC_AVR_REG_Zlo = 31 | ||
let UC_AVR_REG_X = 91 | ||
let UC_AVR_REG_Y = 93 | ||
let UC_AVR_REG_Z = 95 | ||
|
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,150 @@ | ||
package unicorn | ||
// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [avr_const.go] | ||
const ( | ||
|
||
// AVR architectures | ||
AVR_ARCH_AVR1 = 10 | ||
AVR_ARCH_AVR2 = 20 | ||
AVR_ARCH_AVR25 = 25 | ||
AVR_ARCH_AVR3 = 30 | ||
AVR_ARCH_AVR4 = 40 | ||
AVR_ARCH_AVR5 = 50 | ||
AVR_ARCH_AVR51 = 51 | ||
AVR_ARCH_AVR6 = 60 | ||
CPU_AVR_ARCH = 1000 | ||
|
||
// AVR CPU | ||
CPU_AVR_ATMEGA16 = 50016 | ||
CPU_AVR_ATMEGA32 = 50032 | ||
CPU_AVR_ATMEGA64 = 50064 | ||
CPU_AVR_ATMEGA128 = 51128 | ||
CPU_AVR_ATMEGA128RFR2 = 51129 | ||
CPU_AVR_ATMEGA1280 = 51130 | ||
CPU_AVR_ATMEGA256 = 60256 | ||
CPU_AVR_ATMEGA256RFR2 = 60257 | ||
CPU_AVR_ATMEGA2560 = 60258 | ||
|
||
// AVR memory | ||
AVR_MEM_FLASH = 134217728 | ||
|
||
// AVR registers | ||
|
||
AVR_REG_INVALID = 0 | ||
AVR_REG_R0 = 1 | ||
AVR_REG_R1 = 2 | ||
AVR_REG_R2 = 3 | ||
AVR_REG_R3 = 4 | ||
AVR_REG_R4 = 5 | ||
AVR_REG_R5 = 6 | ||
AVR_REG_R6 = 7 | ||
AVR_REG_R7 = 8 | ||
AVR_REG_R8 = 9 | ||
AVR_REG_R9 = 10 | ||
AVR_REG_R10 = 11 | ||
AVR_REG_R11 = 12 | ||
AVR_REG_R12 = 13 | ||
AVR_REG_R13 = 14 | ||
AVR_REG_R14 = 15 | ||
AVR_REG_R15 = 16 | ||
AVR_REG_R16 = 17 | ||
AVR_REG_R17 = 18 | ||
AVR_REG_R18 = 19 | ||
AVR_REG_R19 = 20 | ||
AVR_REG_R20 = 21 | ||
AVR_REG_R21 = 22 | ||
AVR_REG_R22 = 23 | ||
AVR_REG_R23 = 24 | ||
AVR_REG_R24 = 25 | ||
AVR_REG_R25 = 26 | ||
AVR_REG_R26 = 27 | ||
AVR_REG_R27 = 28 | ||
AVR_REG_R28 = 29 | ||
AVR_REG_R29 = 30 | ||
AVR_REG_R30 = 31 | ||
AVR_REG_R31 = 32 | ||
AVR_REG_PC = 33 | ||
AVR_REG_SP = 34 | ||
AVR_REG_RAMPD = 57 | ||
AVR_REG_RAMPX = 58 | ||
AVR_REG_RAMPY = 59 | ||
AVR_REG_RAMPZ = 60 | ||
AVR_REG_EIND = 61 | ||
AVR_REG_SPL = 62 | ||
AVR_REG_SPH = 63 | ||
AVR_REG_SREG = 64 | ||
|
||
// 16-bit coalesced registers | ||
AVR_REG_R0W = 65 | ||
AVR_REG_R1W = 66 | ||
AVR_REG_R2W = 67 | ||
AVR_REG_R3W = 68 | ||
AVR_REG_R4W = 69 | ||
AVR_REG_R5W = 70 | ||
AVR_REG_R6W = 71 | ||
AVR_REG_R7W = 72 | ||
AVR_REG_R8W = 73 | ||
AVR_REG_R9W = 74 | ||
AVR_REG_R10W = 75 | ||
AVR_REG_R11W = 76 | ||
AVR_REG_R12W = 77 | ||
AVR_REG_R13W = 78 | ||
AVR_REG_R14W = 79 | ||
AVR_REG_R15W = 80 | ||
AVR_REG_R16W = 81 | ||
AVR_REG_R17W = 82 | ||
AVR_REG_R18W = 83 | ||
AVR_REG_R19W = 84 | ||
AVR_REG_R20W = 85 | ||
AVR_REG_R21W = 86 | ||
AVR_REG_R22W = 87 | ||
AVR_REG_R23W = 88 | ||
AVR_REG_R24W = 89 | ||
AVR_REG_R25W = 90 | ||
AVR_REG_R26W = 91 | ||
AVR_REG_R27W = 92 | ||
AVR_REG_R28W = 93 | ||
AVR_REG_R29W = 94 | ||
AVR_REG_R30W = 95 | ||
|
||
// 32-bit coalesced registers | ||
AVR_REG_R0D = 97 | ||
AVR_REG_R1D = 98 | ||
AVR_REG_R2D = 99 | ||
AVR_REG_R3D = 100 | ||
AVR_REG_R4D = 101 | ||
AVR_REG_R5D = 102 | ||
AVR_REG_R6D = 103 | ||
AVR_REG_R7D = 104 | ||
AVR_REG_R8D = 105 | ||
AVR_REG_R9D = 106 | ||
AVR_REG_R10D = 107 | ||
AVR_REG_R11D = 108 | ||
AVR_REG_R12D = 109 | ||
AVR_REG_R13D = 110 | ||
AVR_REG_R14D = 111 | ||
AVR_REG_R15D = 112 | ||
AVR_REG_R16D = 113 | ||
AVR_REG_R17D = 114 | ||
AVR_REG_R18D = 115 | ||
AVR_REG_R19D = 116 | ||
AVR_REG_R20D = 117 | ||
AVR_REG_R21D = 118 | ||
AVR_REG_R22D = 119 | ||
AVR_REG_R23D = 120 | ||
AVR_REG_R24D = 121 | ||
AVR_REG_R25D = 122 | ||
AVR_REG_R26D = 123 | ||
AVR_REG_R27D = 124 | ||
AVR_REG_R28D = 125 | ||
|
||
// Alias registers | ||
AVR_REG_Xhi = 28 | ||
AVR_REG_Xlo = 27 | ||
AVR_REG_Yhi = 30 | ||
AVR_REG_Ylo = 29 | ||
AVR_REG_Zhi = 32 | ||
AVR_REG_Zlo = 31 | ||
AVR_REG_X = 91 | ||
AVR_REG_Y = 93 | ||
AVR_REG_Z = 95 | ||
) |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Oops, something went wrong.