Skip to content

Issues: ultraembedded/biriscv

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

20 Open 5 Closed
20 Open 5 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

SDK environment
#26 opened Oct 14, 2024 by chengquan
4
Boot RISC-V Linux Failed, ERROR: Invalid opcode: 30529073 at PC: 8040016c
#25 opened Oct 3, 2023 by RonxBulld
Wrong opcode for CSR_MCYCLE, CSR_MTIME and CSR_MTIMEH
#24 opened Sep 23, 2023 by Gianluke27
FPGA Implementation
#23 opened Sep 15, 2023 by SB308
undefined reference to `VlThreadPool::VlThreadPool(VerilatedContext*, unsigned int)'
#22 opened Aug 30, 2023 by samuelyenyen
1
Division by 0
#21 opened Apr 24, 2023 by CrazybinaryLi
make failed...error
#20 opened Apr 16, 2023 by crayon7442
1
Operating Frequency
#19 opened Aug 19, 2022 by anandmay22
1
Consider taping out core on SKY130 open source process with no cost shuttle program?
#18 opened Apr 12, 2022 by mithro
Consider adding biriscv to LiteX CPU ecosystem?
#17 opened Apr 12, 2022 by mithro
LWGP
#16 opened Feb 16, 2022 by altuSemi
about Branch target buffer
#15 opened Nov 16, 2021 by cool-ic
2
link library for biriscv
#13 opened Sep 4, 2021 by riya1407
JTAG Debugging Request
#12 opened Aug 27, 2021 by nvitya
Not an issue, rather a request
#10 opened Apr 11, 2021 by bhawandeepsingh
How initializa the memory from the verilog
#9 opened Nov 18, 2020 by emiliofmc7
TCL file for FPGA build
#8 opened Oct 11, 2020 by alaasal
1
Questions Biriscv
#7 opened Oct 6, 2020 by emiliofmc7
Using own ELF results in an infinite loop
#4 opened Jul 15, 2020 by MakisChristou
5
Bug: 'csr_swap' type operations on SATP register do not work bug Something isn't working
#1 opened Mar 14, 2020 by ultraembedded
@ultraembedded
ProTip! Exclude everything labeled bug with -label:bug.