TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
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Updated
May 1, 2022 - C++
TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
The Mythical CPU Simulator for Real Students
This is an HTML/Javascript CPU simulator and assembler for the CPU I designed. Originally, I created this CPU on paper many years ago for a homework assignment in college. More recently, I implemented my design in the Logisim logic simulator, and eventually it ran on an FPGA.
A small and simple 8-bit CPU built in Logisim. The project also includes an assembler and a manual for those who want to learn how a processor works.
💡 WepSIM: Web Elemental Processor SIMulator 📱 💻 🖥️
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This is a second version my previous RPNv1 project. This project demonstrates how a CPU works the fetch, decode, execute, and store operations.
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