missed file for clang

rizinorg · Jan 8, 2024 · f6c65f6 · f6c65f6
1 parent 4f5b842
commit f6c65f6
Showing 1 changed file with 81 additions and 27 deletions.
diff --git a/librz/main/rz-asm.c b/librz/main/rz-asm.c
@@ -174,33 +174,87 @@ static int rasm_show_help(int v) {
 				   "             [-f file] [-F fil:ter] [-i skip] [-l len] 'code'|hex|-\n");
 	}
 	const char *options[] = {
-	"-a",	"[arch]",	"Set architecture to assemble/disassemble (see -L)",
-	"-A",	"", 		             "Show Analysis information from given hexpairs",
-	"-b","[bits]","Set cpu register size (8, 16, 32, 64) (RZ_ASM_BITS)",
-	"-B","","Binary input/output (-l is mandatory for binary input)",
-	"-c","[cpu]","Select specific CPU (depends on arch)",
-	"-C","","Output in C format",
-	"-d, -D","","Disassemble from hexpair bytes (-D show hexpairs)",
-	"-e","","Use big endian instead of little endian",
-	"-I","","Display lifted RzIL code (same input as in -d, IL is also validated)",
-	"-E","","Display ESIL expression (same input as in -d)",
-	"-f","[file]","Read data from file",
-		"-F","[in:out]","Specify input and/or output filters (att2intel, x86.pseudo, ...)",
-		"-h, -hh","","Show this help, -hh for long",
-		"-i","[len]","ignore/skip N bytes of the input buffer",
-		"-j","","output in json format",
-		"-k","[kernel]","Select operating system (linux, windows, darwin, ..)",
-		"-l","[len]","Input/Output length",
-		"-L","","List Asm plugins: (a=asm, d=disasm, A=analyze, e=ESIL)",
-		"-o, -@","[addr]","Set start address for code (default 0)",
-		"-O","[file]","Output file name (rz-asm -Bf a.asm -O a)",
-		"-p","","Run SPP over input for assembly",
-		"-q","","quiet mode",
-		"-r","","output in rizin commands",
-		"-s","[syntax]","Select syntax (intel, att)",
-		"-v","","Show version information",
-		"-x","","Use hex dwords instead of hex pairs when assembling.",
-		"-w","","What's this instruction for? describe opcode",
+		"-a",
+		"[arch]",
+		"Set architecture to assemble/disassemble (see -L)",
+		"-A",
+		"",
+		"Show Analysis information from given hexpairs",
+		"-b",
+		"[bits]",
+		"Set cpu register size (8, 16, 32, 64) (RZ_ASM_BITS)",
+		"-B",
+		"",
+		"Binary input/output (-l is mandatory for binary input)",
+		"-c",
+		"[cpu]",
+		"Select specific CPU (depends on arch)",
+		"-C",
+		"",
+		"Output in C format",
+		"-d, -D",
+		"",
+		"Disassemble from hexpair bytes (-D show hexpairs)",
+		"-e",
+		"",
+		"Use big endian instead of little endian",
+		"-I",
+		"",
+		"Display lifted RzIL code (same input as in -d, IL is also validated)",
+		"-E",
+		"",
+		"Display ESIL expression (same input as in -d)",
+		"-f",
+		"[file]",
+		"Read data from file",
+		"-F",
+		"[in:out]",
+		"Specify input and/or output filters (att2intel, x86.pseudo, ...)",
+		"-h, -hh",
+		"",
+		"Show this help, -hh for long",
+		"-i",
+		"[len]",
+		"ignore/skip N bytes of the input buffer",
+		"-j",
+		"",
+		"output in json format",
+		"-k",
+		"[kernel]",
+		"Select operating system (linux, windows, darwin, ..)",
+		"-l",
+		"[len]",
+		"Input/Output length",
+		"-L",
+		"",
+		"List Asm plugins: (a=asm, d=disasm, A=analyze, e=ESIL)",
+		"-o, -@",
+		"[addr]",
+		"Set start address for code (default 0)",
+		"-O",
+		"[file]",
+		"Output file name (rz-asm -Bf a.asm -O a)",
+		"-p",
+		"",
+		"Run SPP over input for assembly",
+		"-q",
+		"",
+		"quiet mode",
+		"-r",
+		"",
+		"output in rizin commands",
+		"-s",
+		"[syntax]",
+		"Select syntax (intel, att)",
+		"-v",
+		"",
+		"Show version information",
+		"-x",
+		"",
+		"Use hex dwords instead of hex pairs when assembling.",
+		"-w",
+		"",
+		"What's this instruction for? describe opcode",
 	};
 	if (v != 1) {
 		size_t maxOptionAndArgLength = 0;