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UEFI RAS events
The UEFI BIOS on Annex N (present at the spec since its version 2.1) the Common Platform Error Record (CPER) for the firmware to report errors from different kinds of hardware.
There are several types of CPER events for different types of hardware:
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CPU (UEFI 2.1, extended on UEFI 2.6 to add ARM):
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N.2.4: Processor. It supports 4 types of processors:
- Generic Processor (UEFI 2.1);
- IA32/X64 processor (x86 architecture) (UEFI 2.1);
- IA64 processor (Itanium) (UEFI 2.1);
- ARM processor (UEFI 2.6 and upper).
Each processor type has a different error event.
It be noticed that, while ARM was added on UEFI 2.6, the encoding of the error type was only specified at the UEFI 2.9A errata. Before that, it was only mentioning that the field was encoding the type (cache, tlb, bus, micro-arch errors), but no mention if this was a bitmask or an integer. Spec 2.9A clearly stated it as a bitmask and defined the meaning of each bit.
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Memory (UEFI 2.1, extended on UEFI 2.5):
- N.2.5: Memory error (UEFI 2.1);
- N.2.6: Memory error 2 (UEFI 2.5).
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PCI/PCIe (UEFI 2.1):
- N.2.7: PCI express
- N.2.8: PCI/PCI-X bus
- N.2.9: PCI/PCI-X component
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Firmware (UEFI 2.1):
- N2.10: Firmware
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DMA (UEFI 2.2):
- N2.11: DMA
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Cache Coherent Interconnect - CCIX (UEFI 2.8):
- N2.12: CCIX PER log.
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Compute Express Link (UEFI 2.9):
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Others (UEFI 2.1):
- N.2.3: Non-standard.