Port heads to system76 galago pro 5

boards/galp5/cmos.default

@@ -0,0 +1,5 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+boot_option=Fallback
+debug_level=Debug
+me_state=Enable

boards/galp5/cmos.layout

@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+entries
+
+0	384	r	0	reserved_memory
+
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384	1	e	4	boot_option
+388	4	h	0	reboot_counter
+
+# RTC_CLK_ALTCENTURY
+400	8	r	0	century
+
+412	4	e	6	debug_level
+416	1	e	2	me_state
+417	3	h	0	me_state_counter
+904	80	h	0	ramtop
+984	16	h	0	check_sum
+
+enumerations
+
+2	0	Enable
+2	1	Disable
+
+4	0	Fallback
+4	1	Normal
+
+6	0	Emergency
+6	1	Alert
+6	2	Critical
+6	3	Error
+6	4	Warning
+6	5	Notice
+6	6	Info
+6	7	Debug
+6	8	Spew
+
+checksums
+
+checksum 408 983 984

boards/galp5/galp5.config

@@ -0,0 +1,59 @@
+CONFIG_LINUX_CONFIG=config/linux-galp5.config
+CONFIG_COREBOOT_CONFIG=config/coreboot-galp5.config
+export CONFIG_BOOT_DEV="/dev/nvme0n1p1"
+export CONFIG_ROOT_DEV="/dev/nvme0n1p3"
+CONFIG_CRYPTSETUP2=y
+CONFIG_FLASHROM=y
+CONFIG_FLASHTOOLS=y
+CONFIG_GPG2=y
+CONFIG_KEXEC=y
+CONFIG_UTIL_LINUX=y
+CONFIG_LVM2=y
+CONFIG_MBEDTLS=y
+CONFIG_PCIUTILS=y
+CONFIG_POPT=y
+CONFIG_QRENCODE=y
+CONFIG_TPMTOTP=y
+CONFIG_CAIRO=y
+CONFIG_FBWHIPTAIL=y
+CONFIG_HOTPKEY=y
+CONFIG_LINUX_USB=y
+#export CONFIG_TPM=y
+export CONFIG_TPM2_TOOLS=y
+export CONFIG_PRIMARY_KEY_TYPE=ecc
+CONFIG_TPM2_TSS=y
+CONFIG_OPENSSL=y
+export CONFIG_BOOTSCRIPT=/bin/gui-init
+export CONFIG_BOOT_REQ_HASH=n
+export CONFIG_BOOT_REQ_ROLLBACK=n
+export CONFIG_BOOT_KERNEL_ADD=""
+export CONFIG_BOOT_KERNEL_REMOVE=""
+export CONFIG_ROOT_DIRLIST="bin boot lib sbin usr"
+export CONFIG_ROOT_CHECK_AT_BOOT="n"
+export CONFIG_AUTO_BOOT_TIMEOUT=5
+export CONFIG_COREBOOT=y
+export CONFIG_COREBOOT_VERSION=4.22.01
+export CONFIG_LINUX_VERSION=5.10.5
+#export CONFIG_LINUX_VERSION=5.16.19
+export CONFIG_BOARD_NAME="galp5"
+CONFIG_IO386=y
+
+CONFIG_VENDOR_SYSTEM76=y
+CONFIG_BOARD_SYSTEM76_GALP5=y
+CONFIG_CCACHE=y
+CONFIG_CONSOLE_SERIAL=n
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_HAVE_ME_BIN=y
+CONFIG_IFD_BIN_PATH="boards/galp5/fd.rom"
+CONFIG_ME_BIN_PATH="boards/galp5/me.rom"
+CONFIG_PAYLOAD_ELF=y
+CONFIG_PAYLOAD_FILE=coreboot.rom
+CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
+CONFIG_POST_IO=n
+CONFIG_SMMSTORE=y
+CONFIG_SMMSTORE_V2=y
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
+#CONFIG_CONSOLE_SYSTEM76_EC=y

boards/galp5/memlayout.ld

@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <memlayout.h>
+#include <arch/header.ld>
+
+/*
+ * The bootblock linker script should be included before the Cache-As-RAM linker
+ * script. Indeed, if it is included after and Cache-As-RAM .data section
+ * support is enabled, the definition order of the sections makes the linker
+ * create an image with an almost 4 GB hole.
+ */
+#if ENV_BOOTBLOCK
+INCLUDE "bootblock/arch/x86/bootblock.ld"
+#endif /* ENV_BOOTBLOCK */
+
+SECTIONS
+{
+	/*
+	 * It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
+	 * like other architectures/chipsets it's not possible because of
+	 * the linking games played during romstage creation by trying
+	 * to find the final landing place in CBFS for XIP. Therefore,
+	 * conditionalize with macros.
+	 */
+#if ENV_RAMSTAGE
+	/* Relocated at runtime in cbmem so the address does not matter. */
+	RAMSTAGE(64M, 8M)
+
+#elif ENV_SEPARATE_ROMSTAGE
+	/* The 1M size is not allocated. It's just for basic size checking.
+	 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
+	ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
+
+	INCLUDE "romstage/arch/x86/car.ld"
+#elif ENV_SEPARATE_VERSTAGE
+	/* The 1M size is not allocated. It's just for basic size checking.
+	 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
+	VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
+
+	INCLUDE "verstage/arch/x86/car.ld"
+#elif ENV_BOOTBLOCK
+
+	INCLUDE "bootblock/arch/x86/car.ld"
+
+#elif ENV_POSTCAR
+	POSTCAR(32M, 1M)
+#endif
+}

boards/galp5/tigerlake/chipset.cb

@@ -0,0 +1,157 @@
+chip soc/intel/tigerlake
+
+	device cpu_cluster 0 on end
+	device domain 0 on
+		device gpio 0 alias pch_gpio on end
+		device pci 00.0 alias system_agent on end
+		device pci 02.0 alias igpu off end
+		device pci 04.0 alias dptf off end
+		device pci 05.0 alias ipu off end
+		device pci 06.0 alias peg off end
+		device pci 07.0 alias tbt_pcie_rp0 off
+			chip soc/intel/common/block/usb4
+				use tbt_dma0 as usb4_port
+				device generic 0 on end
+			end
+		end
+		device pci 07.1 alias tbt_pcie_rp1 off
+			chip soc/intel/common/block/usb4
+				use tbt_dma0 as usb4_port
+				device generic 1 on end
+			end
+		end
+		device pci 07.2 alias tbt_pcie_rp2 off
+			chip soc/intel/common/block/usb4
+				use tbt_dma1 as usb4_port
+				device generic 0 on end
+			end
+		end
+		device pci 07.3 alias tbt_pcie_rp3 off
+			chip soc/intel/common/block/usb4
+				use tbt_dma1 as usb4_port
+				device generic 1 on end
+			end
+		end
+		device pci 08.0 alias gna off end
+		device pci 09.0 alias npk off end
+		device pci 0a.0 alias crashlog off end
+		device pci 0d.0 alias north_xhci off
+			chip drivers/usb/acpi
+				register "type" = "UPC_TYPE_HUB"
+				device usb 0.0 alias tcss_root_hub off
+					chip drivers/usb/acpi
+						device usb 3.0 alias tcss_usb3_port1 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.1 alias tcss_usb3_port2 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.2 alias tcss_usb3_port3 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.3 alias tcss_usb3_port4 off end
+					end
+				end
+			end
+		end
+		device pci 0d.1 alias north_xdci off end
+		device pci 0d.2 alias tbt_dma0 off end
+		device pci 0d.3 alias tbt_dma1 off end
+		device pci 0e.0 alias vmd off end
+		device pci 10.6 alias thc0 off end
+		device pci 10.7 alias thc1 off end
+		device pci 12.0 alias ish off end
+		device pci 12.6 alias gspi2 off end
+		device pci 13.0 alias gspi3 off end
+		device pci 14.0 alias south_xhci off
+			chip drivers/usb/acpi
+				register "type" = "UPC_TYPE_HUB"
+				device usb 0.0 alias xhci_root_hub off
+					chip drivers/usb/acpi
+						device usb 2.0 alias usb2_port1 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.1 alias usb2_port2 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.2 alias usb2_port3 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.3 alias usb2_port4 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.4 alias usb2_port5 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.5 alias usb2_port6 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.6 alias usb2_port7 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.7 alias usb2_port8 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.8 alias usb2_port9 off end
+					end
+					chip drivers/usb/acpi
+						device usb 2.9 alias usb2_port10 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.0 alias usb3_port1 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.1 alias usb3_port2 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.2 alias usb3_port3 off end
+					end
+					chip drivers/usb/acpi
+						device usb 3.3 alias usb3_port4 off end
+					end
+				end
+			end
+		end
+		device pci 14.1 alias south_xdci off end
+		device pci 14.2 alias shared_ram off end
+		device pci 14.3 alias cnvi_wifi off end
+		device pci 15.0 alias i2c0 off end
+		device pci 15.1 alias i2c1 off end
+		device pci 15.2 alias i2c2 off end
+		device pci 15.3 alias i2c3 off end
+		device pci 16.0 alias heci1 off end
+		device pci 16.1 alias heci2 off end
+		device pci 16.2 alias csme1 off end
+		device pci 16.3 alias csme2 off end
+		device pci 16.4 alias heci3 off end
+		device pci 16.5 alias heci4 off end
+		device pci 17.0 alias sata off end
+		device pci 19.0 alias i2c4 off end
+		device pci 19.1 alias i2c5 off end
+		device pci 19.2 alias uart2 off end
+		device pci 1c.0 alias pcie_rp1 off end
+		device pci 1c.1 alias pcie_rp2 off end
+		device pci 1c.2 alias pcie_rp3 off end
+		device pci 1c.3 alias pcie_rp4 off end
+		device pci 1c.4 alias pcie_rp5 off end
+		device pci 1c.5 alias pcie_rp6 off end
+		device pci 1c.6 alias pcie_rp7 off end
+		device pci 1c.7 alias pcie_rp8 off end
+		device pci 1d.0 alias pcie_rp9 off end
+		device pci 1d.1 alias pcie_rp10 off end
+		device pci 1d.2 alias pcie_rp11 off end
+		device pci 1d.3 alias pcie_rp12 off end
+		device pci 1e.0 alias uart0 off end
+		device pci 1e.1 alias uart1 off end
+		device pci 1e.2 alias gspi0 off end
+		device pci 1e.3 alias gspi1 off end
+		device pci 1f.0 alias pch_espi on end
+		device pci 1f.1 alias p2sb off end
+		device pci 1f.2 alias pmc hidden end
+		device pci 1f.3 alias hda off end
+		device pci 1f.4 alias smbus off end
+		device pci 1f.5 alias fast_spi on end
+		device pci 1f.6 alias gbe off end
+		device pci 1f.7 alias tracehub off end
+	end
+end

boards/galp5/tlg-u/board.fmd

@@ -0,0 +1,12 @@
+FLASH 16M {
+	SI_DESC 4K
+	SI_ME 5116K
+	SI_BIOS 11M {
+		RW_MRC_CACHE 64K
+		SMMSTORE(PRESERVE) 256K
+		WP_RO {
+			FMAP 4K
+			COREBOOT(CBFS)
+		}
+	}
+}