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goatgate/README.md
  • 👋 Hi, I’m sriram
  • 👀 I’m interested in Eda tools, Circuit Design and Compilers
  • 🌱 I’m currently learning python,ocaml and verilog
  • 💞️ I’m looking to collaborate on creating better opensource eda tools
  • 📫 How to reach me [email protected]
  • 😄 Pronouns: He/Him
  • ⚡ Fun fact: Verilog was made opensource in 1991

Pinned Loading

  1. MSDAP MSDAP Public

    A low power dsp processor

  2. serdes serdes Public

    RTL implementation of SerDes

    C

  3. tt09-teeny-tiny-aes-template tt09-teeny-tiny-aes-template Public template

    Forked from TinyTapeout/tt09-verilog-template

    a verilog implementation of a simple custom cipher unit inspired by aes

    Verilog

  4. risc-v risc-v Public

    everything risc v related goes here

  5. systolic-core systolic-core Public

    Binary classification using systolic matrix