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Original file line number | Diff line number | Diff line change |
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#include <Arduino.h> | ||
#include <Wire.h> | ||
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||
#include "plugin.h" | ||
#include "hwconfig.h" | ||
#include "AK4458.h" | ||
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||
//============================================================================== | ||
/*! | ||
*/ | ||
void AK4458_REGWRITE( byte reg, byte val ) | ||
{ | ||
Wire.beginTransmission( AK4458_I2C_ADDR ); | ||
Wire.write( reg ); | ||
Wire.write( val ); | ||
Wire.endTransmission( true ); | ||
} | ||
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||
//============================================================================== | ||
/*! Configure AK4458 DAC | ||
*/ | ||
void configDAC( void ) | ||
{ | ||
/* Control 1 (Address: 0x00) | ||
* bit[0] : RSTN: Internal Timing Reset : 0 Reset | ||
* bit[3:1] : DIF2-0: Audio Data Interface Modes : 110 Mode 18 | ||
* bit[7] : ACKS: Master Clock Frequency Auto Setting Mode Enable : 0 Manual Setting Mode | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL1, 0b00001100 ); | ||
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||
/* Control 2 (Address: 0x01) | ||
* bit[0] : SMUTE Soft Mute Enable : 0 Normal Operation | ||
* bit[2:1] : DEM11-0 DAC1 De-emphasis Response : 01 Off | ||
* bit[4:3] : DFS1-0 Sampling Speed Control : 00 Normal Speed | ||
* bit[5] : SD Short delay Filter Enable : 1 Short delay filter | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL2, 0b00100010 ); | ||
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||
/* Control 3 (Address: 0x02) | ||
* bit[0] : SLOW Slow Roll-off Filter Enable : 0 Sharp roll-off filter | ||
* bit[1] : SELLR1 Data selection of DAC1 L & R, when MONO mode : 0 Default | ||
* bit[2] : DZFB Inverting Enable of DZF : 0 DZF pin goes “H” at Zero Detection | ||
* bit[3] : MONO1 DAC1 enters monaural output mode : 0 Stereo mode | ||
* bit[4] : DCKBPolarity of DCLK (DSD Only) : 0 DSD data is output from DCLK falling edge | ||
* bit[5] : DCKS Master Clock Frequency Select at DSD mode : 0 512fs | ||
* bit[7] : DP DSD/PCM Mode Select : 0 PCM Mode | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL3, 0b00000000 ); | ||
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||
AK4458_REGWRITE( AK4458_L1CHATT, 0xFF ); | ||
AK4458_REGWRITE( AK4458_R1CHATT, 0xFF ); | ||
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/* Control 4 (Address: 0x05) | ||
* bit[0] : SSLOW Digital Filter Bypass Mode Enable : 0 Enable digital filter selected by SD and SLOW bits | ||
* bit[1] : DFS2 Sampling Speed Control : 0 Normal Speed | ||
* bit[3] : SELLR2 Data selection of DAC2 L & R, when MONO mode : 0 Default | ||
* bit[4] : INVL1 AOUTL1 Output Phase Inverting Bit : 0 Normal | ||
* bit[5] : INVR1 AOUTR1 Output Phase Inverting Bit : 0 Normal | ||
* bit[6] : INVL2 AOUTL2 Output Phase Inverting Bit : 0 Normal | ||
* bit[7] : INVR2 AOUTR2 Output Phase Inverting Bit : 0 Normal | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL4, 0b00000000 ); | ||
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/* DSD1 (Address: 0x06) | ||
*/ | ||
AK4458_REGWRITE( AK4458_DSD1, 0b00000000 ); | ||
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/* Control 5 (Address: 0x07) | ||
* bit[0] : SYNCE SYNCModeEnable : 1 SYNC Mode Enable | ||
* bit[7:4] : L3-4,R3-4 Zero Detect Flag Enable Bit for the DZF pin : 0 Disable | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL5, 0b00000011 ); | ||
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/* Sound Control (Address: 0x08) | ||
* bit[1:0] : SC1-0 Sound Control : 00 Mode 1 | ||
* bit[7:4] : L1-2,R1-2 Zero Detect Flag Enable Bit for the DZF pin : 0 Disable | ||
*/ | ||
AK4458_REGWRITE( AK4458_SOUNDCONTROL, 0b00000000 ); | ||
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||
/* DSD1 (Address: 0x09) | ||
*/ | ||
AK4458_REGWRITE( AK4458_DSD2, 0b00000000 ); | ||
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/* Control 6 (Address: 0x0A) | ||
* bit[1:0] : DEM21-0 DAC2 De-emphasis Response : 01 Off | ||
* bit[2] : PW1 Power management for DAC1 : 1 On | ||
* bit[3] : PW2 Power management for DAC2 : 1 On | ||
* bit[5:4] : SDS2-1 DAC1-4 Data Select : 00 Normal Operation | ||
* bit[7:6] : TDM Mode Select : 10 TDM256 | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL6, 0b10001101 ); | ||
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||
/* Control 7 (Address: 0x0B) | ||
* bit[1] : DCHAIN Daisy Chain Mode Enable : 0 Daisy Chain Mode Disable | ||
* bit[2] : PW3 Power management for DAC3 : 1 On | ||
* bit[3] : PW4 Power management for DAC4 : 1 On | ||
* bit[4] : SDS0 DAC1-4 Data Select : 0 Normal Operation | ||
* bit[7:6] : ATS1-0 DAC Digital attenuator transition time setting : 00 Mode 0 4080/fs | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL7, 0b00001100 ); | ||
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||
/* Control 8 (Address: 0x0C) | ||
* bit[0:2] : FIR2-0: FIR Filter Control : 000 Default | ||
* bit[4] : INVL3 AOUTL3 Output Phase Inverting Bit : 0 Normal | ||
* bit[5] : INVR3 AOUTR3 Output Phase Inverting Bit : 0 Normal | ||
* bit[6] : INVL4 AOUTL4 Output Phase Inverting Bit : 0 Normal | ||
* bit[7] : INVR4 AOUTR4 Output Phase Inverting Bit : 0 Normal | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL8, 0b00000000 ); | ||
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||
/* Control 9 (Address: 0x0D) | ||
* bit[2] : SELLR3 Data selection of DAC3 L & R, when MONO mode : 0 Default | ||
* bit[3] : SELLR4 Data selection of DAC4 L & R, when MONO mode : 0 Default | ||
* bit[5] : MONO2 DAC2 enters monaural output mode : 0 Stereo mode | ||
* bit[6] : MONO3 DAC3 enters monaural output mode : 0 Stereo mode | ||
* bit[7] : MONO4 DAC4 enters monaural output mode : 0 Stereo mode | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL9, 0b00000000 ); | ||
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||
/* Control 10 (Address: 0x0E) | ||
* bit[5:4] : DEM31-0 DAC3 De-emphasis Response : 01 Off | ||
* bit[7:6] : DEM41-0 DAC4 De-emphasis Response : 01 Off | ||
*/ | ||
AK4458_REGWRITE( AK4458_CONTROL10, 0b01010000 ); | ||
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AK4458_REGWRITE( AK4458_L2CHATT, 0xFF ); | ||
AK4458_REGWRITE( AK4458_R2CHATT, 0xFF ); | ||
AK4458_REGWRITE( AK4458_L3CHATT, 0xFF ); | ||
AK4458_REGWRITE( AK4458_R3CHATT, 0xFF ); | ||
AK4458_REGWRITE( AK4458_L4CHATT, 0xFF ); | ||
AK4458_REGWRITE( AK4458_R4CHATT, 0xFF ); | ||
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// Release Reset by rewriting Control1 | ||
/* Control 1 (Address: 0x00) | ||
* bit[0] : RSTN: Internal Timing Reset : 1 Normal Operation | ||
* bit[3:1] : DIF2-0: Audio Data Interface Modes : 110 Mode 18 | ||
* bit[7] : ACKS: Master Clock Frequency Auto Setting Mode Enable : 0 Manual Setting Mode | ||
*/ | ||
//AK4458_REGWRITE( AK4458_CONTROL1, 0b00001101 ); | ||
} | ||
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//============================================================================== | ||
/*! Set DAC into reset. | ||
*/ | ||
void resetDAC( bool rst ) | ||
{ | ||
if( rst ) | ||
AK4458_REGWRITE( AK4458_CONTROL1, 0b00001100 ); | ||
else | ||
AK4458_REGWRITE( AK4458_CONTROL1, 0b00001101 ); | ||
} | ||
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//============================================================================== | ||
/*! Mute DAC | ||
*/ | ||
void softMuteDAC( void ) | ||
{ | ||
AK4458_REGWRITE( AK4458_CONTROL2, 0b00100011 ); | ||
delay( 500 ); | ||
} | ||
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//============================================================================== | ||
/*! Unmute DAC | ||
*/ | ||
void softUnmuteDAC( void ) | ||
{ | ||
delay( 250 ); | ||
AK4458_REGWRITE( AK4458_CONTROL2, 0b00100010 ); | ||
} | ||
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,88 @@ | ||
#include <Arduino.h> | ||
#include <Wire.h> | ||
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#include "plugin.h" | ||
#include "hwconfig.h" | ||
#include "AK5558.h" | ||
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||
//============================================================================== | ||
/*! | ||
*/ | ||
void AK5558_REGWRITE( byte reg, byte val) | ||
{ | ||
Wire.beginTransmission( AK5558_I2C_ADDR ); | ||
Wire.write( reg ); | ||
Wire.write( val ); | ||
Wire.endTransmission( true ); | ||
} | ||
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//============================================================================== | ||
/*! Configure AK5558 ADC | ||
*/ | ||
void configADC( void ) | ||
{ | ||
/* Power Management1 (Address: 0x01) | ||
* bit[0] : RSTN: Internal Timing Reset : 0 Reset | ||
* bit[2:1] : MONO2-1: Channel Summation mode Select : 00 Not- Summation mode (default) | ||
*/ | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000000 ); | ||
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/* Control 1 (Address: 0x02) | ||
* bit[0] : HPFE: High Pass Filter Enable : 1 High Pass Filter ON (default) | ||
* bit[2:1] : DIF1-0: Audio Data Interface Mode Select : 10 32bit MSB | ||
* bit[6:3] : CKS3-0: Sampling Speed Mode and MCLK Frequency Select :0110 Normal Speed, 512fs | ||
*/ | ||
AK5558_REGWRITE( AK5558_CONTROL1, 0b00110101 ); | ||
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/* Control 2 (Address: 0x03) | ||
* bit[6:5] : TDM1-0: TDMModesSelect : 10 TDM256 | ||
*/ | ||
AK5558_REGWRITE( AK5558_CONTROL2, 0b01000000 ); | ||
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/* Control 3 (Address: 0x04) | ||
* bit[0] : SLOW: Slow Roll-off Filter Select : 0: Sharp Roll-off (default) | ||
* bit[1] : SD: Short Delay Select : 0: Normal Delay (default) | ||
* bit[7] : DSD Mode Select : 0: PCM mode (default) | ||
*/ | ||
AK5558_REGWRITE( AK5558_CONTROL3, 0b00000000 ); | ||
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/* DSD (Address: 0x05) | ||
* bit[0:1] : DSDSEL1-0:Select the Frequency of DCLK : 00: 64fs (default) | ||
* bit[2] : DCKB: Polarity of DCLK : 0: DSD data is output from DCLK Falling Edge (default) | ||
* bit[3] : PMOD: DSD Phase Modulation Mode : 0: Not Phase Modulation Mode (default) | ||
* bit[5] : DCKS: Master Clock Frequency Select at DSD Mode : 0: 512fs (default) | ||
*/ | ||
AK5558_REGWRITE( AK5558_DSD, 0b00000000 ); | ||
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||
/* Power Management1 (Address: 0x01) | ||
* bit[0] : RSTN: Internal Timing Reset : 1 Normal operation | ||
* bit[2:1] : MONO2-1: Channel Summation mode Select : 00 Not- Summation mode (default) | ||
*/ | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000001 ); | ||
} | ||
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//============================================================================== | ||
/*! Change the channel summation of AK5558 ADC | ||
*/ | ||
void changeChannelSummationADC( void ) | ||
{ | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000000 ); | ||
delay(100); | ||
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// Normal operation | ||
if( Settings.adcsum == 0 ) | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000001 ); | ||
// 8-to-4 mode | ||
else if( Settings.adcsum == 1 ) | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000101 ); | ||
// 8-to-2 mode | ||
else if( Settings.adcsum == 2 ) | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000011 ); | ||
// 8-to-1 mode | ||
else if( Settings.adcsum == 3 ) | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000111 ); | ||
// fallback to normal operation | ||
else | ||
AK5558_REGWRITE( AK5558_POWERMANAGEMENT2, 0b00000001 ); | ||
} | ||
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