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Add a new architecture mode: 'avx512-sr'. #4025

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mulugetam
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This PR adds a new architecture mode to support the new extensions to AVX512, namely AVX512-FP16, which have been available since Intel® Sapphire Rapids.

This PR is a prerequisite for PR#4020 that speeds up hamming distance evaluations.

@mengdilin
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Hmm weird the CIs are not running on the PR. Do you mind pushing a new commit and see if the CIs start?

Signed-off-by: Mulugeta Mammo <[email protected]>
@mulugetam
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@mengdilin Pushed a new commit but CI not starting. Is this possibly because I updated .github/workflows/build.yml?

@mengdilin
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Yea there is a syntax error in the build file: see https://github.com/facebookresearch/faiss/actions/runs/11804384709

@@ -67,6 +67,17 @@ jobs:
uses: ./.github/actions/build_cmake
with:
opt_level: avx512
linux-x86_64-AVX512-cmake:
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linux-x86_64-AVX512-advanced-cmake

@mulugetam
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@mengdilin CI is picking g++ version 11. But AVX512-FP16 (-mavx512fp16) requires version 12+.

@mengdilin
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Ah yea the conda publication CI is using the older compiler version. We should investigate on our side; however, I don't think we want to publish this architecture mode to conda right now, can you omit it?

Looks like CI failure is coming from a unit test failure from

def test_ivf_train_2level(self):

Try commenting out that test and see if anything else fails?
I'm going on PTO, handing this over to the next performance oncall @kuarora

-DFAISS_ENABLE_GPU=OFF \
-DFAISS_ENABLE_PYTHON=OFF \
-DBLA_VENDOR=Intel10_64lp \
-DCMAKE_INSTALL_LIBDIR=lib \
-DCMAKE_BUILD_TYPE=Release .

make -C _build -j$(nproc) faiss faiss_avx2 faiss_avx512
make -C _build -j$(nproc) faiss faiss_avx2 faiss_avx512 faiss_avx512_sr
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This is used for faiss's conda packaging upload. I don't think we want to expose this build mode yet in conda officially. Can you omit this for now?

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Removed.

@mulugetam
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Thanks @mengdilin. @kuarora Could you please review?

@alexanderguzhva
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@mulugetam I would use -march=sapphirerapids -mtune=sapphirerapids for the compiler flags, because SR supports many other AVX512 instruction extensions that are not currently listed among compiler flags

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5 participants