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install python3-tk
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config updates
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kareefardi committed Aug 17, 2023
1 parent af9c913 commit 1c2bdc7
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Showing 4 changed files with 9 additions and 5 deletions.
1 change: 1 addition & 0 deletions .github/workflows/user_project_ci.yml
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Expand Up @@ -28,6 +28,7 @@ jobs:

- name: Install dependencies
run: |
sudo apt install -y python3-tk
sudo mkdir -p ${{ env.PDK_ROOT }}
sudo chown -R $USER:$USER ${{ env.PDK_ROOT }}
make install
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1 change: 1 addition & 0 deletions openlane/user_proj_example/base_user_proj_example.sdc
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Expand Up @@ -11,6 +11,7 @@
# Pre-defined Constraints
#------------------------------------------#

set ::env(IO_SYNC) 0
# Clock network
if {[info exists ::env(CLOCK_PORT)] && $::env(CLOCK_PORT) != ""} {
set clk_input $::env(CLOCK_PORT)
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Expand Up @@ -11,6 +11,7 @@
# Pre-defined Constraints
#------------------------------------------#

set ::env(IO_SYNC) 0
# Clock network
if {[info exists ::env(CLOCK_PORT)] && $::env(CLOCK_PORT) != ""} {
set clk_input $::env(CLOCK_PORT)
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11 changes: 6 additions & 5 deletions openlane/user_project_wrapper/config.json
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Expand Up @@ -8,7 +8,7 @@
"CLOCK_PERIOD": 25,
"CLOCK_PORT": "wb_clk_i",
"CLOCK_NET": "mprj.clk",
"FP_PDN_MACRO_HOOKS": "mprj vccd1 vssd1 vccd1 vssd1",
"PDN_MACRO_CONNECTIONS": ["mprj vccd1 vssd1 vccd1 vssd1"],
"MACRO_PLACEMENT_CFG": "dir::macro.cfg",
"MAGIC_DEF_LABELS": 0,
"VERILOG_FILES_BLACKBOX": [
Expand All @@ -18,15 +18,15 @@
"EXTRA_GDS_FILES": "dir::../../gds/user_proj_example.gds",
"EXTRA_LIBS": "dir::../../lib/user_proj_example.lib",
"EXTRA_SPEFS": [
"user_proj_example",
"dir::../../spef/multicorner/user_proj_example.min.spef",
"dir::../../spef/multicorner/user_proj_example.nom.spef",
"user_proj_example",
"dir::../../spef/multicorner/user_proj_example.min.spef",
"dir::../../spef/multicorner/user_proj_example.nom.spef",
"dir::../../spef/multicorner/user_proj_example.max.spef"
],
"BASE_SDC_FILE": "dir::base_user_project_wrapper.sdc",
"IO_SYNC": 0,
"MAX_TRANSITION_CONSTRAINT": 1.5,
"RUN_LINTER": 0,
"RUN_LINTER": 1,
"QUIT_ON_SYNTH_CHECKS": 0,
"FP_PDN_CHECK_NODES": 0,
"SYNTH_ELABORATE_ONLY": 1,
Expand All @@ -38,6 +38,7 @@
"PL_RESIZER_BUFFER_INPUT_PORTS": 0,
"FP_PDN_ENABLE_RAILS": 0,
"GRT_REPAIR_ANTENNAS": 0,
"GRT_ALLOW_CONGESTION": 1,
"RUN_FILL_INSERTION": 0,
"RUN_TAP_DECAP_INSERTION": 0,
"FP_PDN_VPITCH": 180,
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