ContikiClock enhance controling rTimer resolution and CLOCK_SECOND #39
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…D control from mote + resolution of system clock was fixed on 1kHz, now mote cat provide it by simCLOCK_SECOND + resolution for rTimer mote can provide by simRtimerResolution_hz. This affects polling periodof mote. By default mote polls by 1ms. But for accurate process better time precision need polling with less then 1ms. and rTimer ordinary much more precise. + RTIMER_BUSY_WAIT resolution was downgrade to 1ms. Mote can provide time for precise wait via simRtimerWaitTime it overrides simProcessRunValue polling to requested time
… old resolution config from mote.
Now mote surely define resolution config - is it used or not.
TODO: If we need define resolution for old projects, have to implement interface visual comtrol. But
mote config is much easy way to do this.
* It still can be manualy defined resolution setups in project. And will loads and override defaut resolution.
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I drop saving resolution settings into sim project - they are override default old behaviour, if mote is old - not provided resolution. If project have no resolution setting, mote fully controls resolution - so that RTIMER_CONF_ARCH_SECOND surely controls simulation style. Project`s setting config leaved for later implementation. |
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this patch provide mote control of cooja ContikiClock controling rTimer resolution and CLOCK_SECOND. It work in cooperate with contiki-ng PR #1257 , that provide mote-side resolution control.
Since resolution of mote polling was hard-fixed on 1ms, this accuracy not enough for TSCH stack simulate. A bit changes on slot-operation timing algorithm crushes abylity to syncheonise TSCH motes with each other, since this accuracy can`t be less then 1ms. (Present stack surprisingly takes into sync, bu with the cost of not accurate sync of transmition slot start - it is adjust transmition to 1ms granularity. Looks that sync achieves only with RTIMER_GUARD=0 ).
To provide cooja with accurate syncronise need allow RTIMER_BUSY_WAIT work with accuracy of rtmer, hat demanded by TSCH stack about 32kHz. (but even 8rHz pretty enough)
So for precise resolution, no any cooja sim project changes need to do - it takes mote project RTIMER_CONF_ARCH_SECOND into account, if mote build with PR #1257.
Evaluated roesolution display in log, and saves with .csc project, so, later, this setup loads with project. And if mote have no resolution setup, saved one used as default.
So there:
resolution of system clock was hard-fixed on 1kHz, now mote can provide it by simCLOCK_SECOND
mote can provide resolution for rTimer by simRtimerResolution_hz. This affects polling period of mote.
By default cooja polls mote by 1ms. But for accurate process better time precision
need polling with less then 1ms. rTimer also ordinary much more precise.
RTIMER_BUSY_WAIT resolution was downgraded to 1ms. now Mote can provide time for precise wait via simRtimerWaitTime.