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  • superlu Public Forked from xiaoyeli/superlu
    cogenda/superlu’s past year of commit activity
    C 0 98 0 0 Updated Nov 15, 2021
  • VAFE Public

    Verilog-A frontend

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  • Genius-TCAD-Open Public

    Open-source version of the Genius Semiconductor Device Simulator

    cogenda/Genius-TCAD-Open’s past year of commit activity
    C++ 122 70 19 2 Updated Apr 19, 2020
  • VA-BSIM3v3 Public

    Verilog-A implementation of MOSFET model BSIM3v3

    cogenda/VA-BSIM3v3’s past year of commit activity
    Python 6 1 0 0 Updated Nov 1, 2019
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    Verilog-A backend for Xyce circuit simulator

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    C 1 GPL-3.0 1 1 0 Updated Oct 9, 2019
  • VA-BSIM48 Public

    Verilog-A implementation of MOSFET model BSIM4.8

    cogenda/VA-BSIM48’s past year of commit activity
    Shell 11 10 1 0 Updated Oct 4, 2019
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    LaTeX and LyX templates for technical reports written in English and Chinese languages.

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    TeX 15 4 0 0 Updated May 21, 2018
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    Python 0 LGPL-2.1 249 0 0 Updated Mar 23, 2018
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    cogenda/gss-tcad’s past year of commit activity
    C++ 12 7 0 1 Updated Sep 8, 2016

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