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Benchmark #849

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Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
{
"rvv_bench.ascii_to_utf32": 226749,
"rvv_bench.byteswap": 391077,
"rvv_bench.memcpy": 589350,
"rvv_bench.memset": 285597
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
{
"rvv_bench.ascii_to_utf32": 229892,
"rvv_bench.byteswap": 415921,
"rvv_bench.memcpy": 592239,
"rvv_bench.memset": 295276
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
{
"rvv_bench.ascii_to_utf32": 228089,
"rvv_bench.byteswap": 401959,
"rvv_bench.memcpy": 590978,
"rvv_bench.memset": 289402
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
{
"rvv_bench.ascii_to_utf32": 227173,
"rvv_bench.byteswap": 394703,
"rvv_bench.memcpy": 589878,
"rvv_bench.memset": 286745
}
6 changes: 3 additions & 3 deletions .github/designs/blastoise/t1emu.json
Original file line number Diff line number Diff line change
Expand Up @@ -13,11 +13,11 @@
"intrinsic.softmax": 7032,
"rvv_bench.ascii_to_utf16": 11282,
"rvv_bench.ascii_to_utf32": 4694,
"rvv_bench.byteswap": 19954,
"rvv_bench.byteswap": 20017,
"rvv_bench.mandelbrot": 230851,
"rvv_bench.memcpy": 34534,
"rvv_bench.memcpy": 34718,
"rvv_bench.memset": 11501,
"rvv_bench.mergelines": 24842,
"rvv_bench.strlen": 22697,
"rvv_bench.utf8_count": 151155
"rvv_bench.utf8_count": 151165
}
62 changes: 31 additions & 31 deletions .github/designs/blastoise/t1rocketemu.json
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
{
"asm.memcpy": 751,
"asm.mmm": 51749,
"asm.smoke": 8001,
"asm.strlen": 7986,
"asm.utf8_count": 205,
"asm.memcpy": 774,
"asm.mmm": 51794,
"asm.smoke": 8051,
"asm.strlen": 8009,
"asm.utf8_count": 232,
"codegen.vaadd_vv": 170452,
"codegen.vaadd_vx": 539363,
"codegen.vaaddu_vv": 170452,
Expand Down Expand Up @@ -499,30 +499,30 @@
"codegen.vxor_vx": 136518,
"codegen.vzext_vf2": 14020,
"codegen.vzext_vf4": 4333,
"intrinsic.conv2d_less_m2": 2498,
"intrinsic.linear_normalization": 3350,
"intrinsic.matmul": 65866,
"intrinsic.softmax": 6795,
"mlir.axpy_masked": 4048,
"mlir.conv": 125859,
"mlir.hello": 131,
"mlir.matmul": 56059,
"mlir.maxvl_tail_setvl_front": 700,
"mlir.rvv_vp_intrinsic_add": 466,
"mlir.rvv_vp_intrinsic_add_scalable": 807,
"mlir.stripmining": 8882,
"mlir.vectoradd": 13236,
"pytorch.demo": 31521,
"pytorch.matmul": 69793,
"rvv_bench.ascii_to_utf16": 677090,
"rvv_bench.ascii_to_utf32": 226918,
"rvv_bench.byteswap": 399524,
"rvv_bench.chacha20": 39957,
"rvv_bench.mandelbrot": 512683,
"rvv_bench.memcpy": 671955,
"rvv_bench.memset": 290725,
"rvv_bench.mergelines": 564159,
"rvv_bench.poly1305": 39957,
"rvv_bench.strlen": 219139,
"rvv_bench.utf8_count": 2283382
"intrinsic.conv2d_less_m2": 2550,
"intrinsic.linear_normalization": 3373,
"intrinsic.matmul": 65918,
"intrinsic.softmax": 6824,
"mlir.axpy_masked": 4098,
"mlir.conv": 125881,
"mlir.hello": 175,
"mlir.matmul": 56109,
"mlir.maxvl_tail_setvl_front": 749,
"mlir.rvv_vp_intrinsic_add": 517,
"mlir.rvv_vp_intrinsic_add_scalable": 858,
"mlir.stripmining": 8931,
"mlir.vectoradd": 13281,
"pytorch.demo": 31524,
"pytorch.matmul": 69835,
"rvv_bench.ascii_to_utf16": 690179,
"rvv_bench.ascii_to_utf32": 228538,
"rvv_bench.byteswap": 399715,
"rvv_bench.chacha20": 40010,
"rvv_bench.mandelbrot": 512811,
"rvv_bench.memcpy": 589522,
"rvv_bench.memset": 290522,
"rvv_bench.mergelines": 563328,
"rvv_bench.poly1305": 40010,
"rvv_bench.strlen": 219124,
"rvv_bench.utf8_count": 2230881
}
4 changes: 2 additions & 2 deletions .github/designs/rookidee/t1emu.json
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@
"mlir.stripmining": 27810,
"rvv_bench.ascii_to_utf16": 16070,
"rvv_bench.ascii_to_utf32": 6057,
"rvv_bench.byteswap": 43274,
"rvv_bench.memcpy": 46320,
"rvv_bench.byteswap": 43109,
"rvv_bench.memcpy": 46538,
"rvv_bench.memset": 19350,
"rvv_bench.mergelines": 38541,
"rvv_bench.strlen": 34517,
Expand Down
34 changes: 17 additions & 17 deletions .github/designs/rookidee/t1rocketemu.json
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
{
"asm.mmm": 56295,
"asm.smoke": 7780,
"asm.mmm": 56340,
"asm.smoke": 7830,
"codegen.vaadd_vv": 129499,
"codegen.vaadd_vx": 393229,
"codegen.vaaddu_vv": 129499,
Expand Down Expand Up @@ -430,19 +430,19 @@
"codegen.vxor_vx": 98738,
"codegen.vzext_vf2": 11522,
"codegen.vzext_vf4": 3497,
"intrinsic.conv2d_less_m2": 2540,
"mlir.hello": 130,
"mlir.rvv_vp_intrinsic_add": 462,
"mlir.rvv_vp_intrinsic_add_scalable": 706,
"mlir.stripmining": 27825,
"rvv_bench.ascii_to_utf16": 678943,
"rvv_bench.ascii_to_utf32": 226997,
"rvv_bench.byteswap": 422035,
"rvv_bench.chacha20": 39957,
"rvv_bench.memcpy": 677231,
"rvv_bench.memset": 295653,
"rvv_bench.mergelines": 580218,
"rvv_bench.poly1305": 39957,
"rvv_bench.strlen": 235252,
"rvv_bench.utf8_count": 2346912
"intrinsic.conv2d_less_m2": 2592,
"mlir.hello": 174,
"mlir.rvv_vp_intrinsic_add": 513,
"mlir.rvv_vp_intrinsic_add_scalable": 757,
"mlir.stripmining": 27874,
"rvv_bench.ascii_to_utf16": 692008,
"rvv_bench.ascii_to_utf32": 228630,
"rvv_bench.byteswap": 422042,
"rvv_bench.chacha20": 40010,
"rvv_bench.memcpy": 594872,
"rvv_bench.memset": 295446,
"rvv_bench.mergelines": 579448,
"rvv_bench.poly1305": 40010,
"rvv_bench.strlen": 235255,
"rvv_bench.utf8_count": 2294504
}
2 changes: 1 addition & 1 deletion difftest/dpi_t1rocketemu/src/bus.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ impl ShadowBus {
pub fn new() -> Self {
const DDR_SIZE: usize = 0x80000000;
const SCALAR_SIZE: usize = 0x20000000;
const SRAM_SIZE: usize = 0x00400000;
const SRAM_SIZE: usize = 0x32000000;

Self {
devices: [
Expand Down
3 changes: 3 additions & 0 deletions difftest/dpi_t1rocketemu/src/dpi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -245,6 +245,9 @@ unsafe extern "C" fn axi_write_loadStoreAXI(
info!("driver is ready to quit");
driver.success = true;
driver.quit = true;
} else {
// hack
driver.record_mmio_hack(exit_data);
}
}
});
Expand Down
15 changes: 15 additions & 0 deletions difftest/dpi_t1rocketemu/src/drive.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,8 @@ use elf::{
ElfStream,
};
use std::collections::HashMap;
use std::fs::File;
use std::io::Write as _;
use std::os::unix::fs::FileExt;
use std::{fs, path::Path};
use tracing::{debug, error, info, trace};
Expand All @@ -37,6 +39,8 @@ pub(crate) struct Driver {

shadow_bus: ShadowBus,

mmio_hack_file: Option<File>,

pub(crate) quit: bool,
pub(crate) success: bool,
}
Expand All @@ -47,6 +51,8 @@ impl Driver {
let (e_entry, shadow_bus, _fn_sym_tab) =
Self::load_elf(&args.elf_file).expect("fail creating simulator");

let mmio_hack_file = File::create("mmio_hack.jsonl").unwrap();

Self {
scope,

Expand All @@ -58,6 +64,8 @@ impl Driver {

shadow_bus,

mmio_hack_file: Some(mmio_hack_file),

quit: false,
success: false,
}
Expand Down Expand Up @@ -130,6 +138,13 @@ impl Driver {
Ok((elf.ehdr.e_entry, mem, fn_sym_tab))
}

pub fn record_mmio_hack(&mut self, value: u32) {
let time = get_t();
let mmio_hack = self.mmio_hack_file.as_mut().unwrap();
mmio_hack.write(format!("{{\"cycle\": {time}, \"value\": {value}}}\n").as_bytes()).unwrap();
mmio_hack.flush().unwrap();
}

pub fn update_commit_cycle(&mut self) {
self.last_commit_cycle = get_t();
}
Expand Down
2 changes: 1 addition & 1 deletion nix/overlay.nix
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
final: prev:

let
llvmForRVV_attrName = "llvmPackages_17"; # brand new clang with v0.12 rvv intrinsic support
llvmForRVV_attrName = "llvmPackages_18"; # brand new clang with v0.12 rvv intrinsic support
rv32_pkgs = final.pkgsCross.riscv32-embedded;
rv32_buildPkgs = rv32_pkgs.buildPackages;
in
Expand Down
3 changes: 3 additions & 0 deletions nix/t1/run/run-vcs-emu.nix
Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,9 @@ stdenvNoCC.mkDerivation (finalAttr: {
mv perf.json $out/
fi

# TODO: remove the hack
cp -v mmio_hack.jsonl "$out"

cp -v cm.log "$out"
cp -vr cm.vdb "$out"

Expand Down
4 changes: 3 additions & 1 deletion tests/rvv_bench/t1_runtime.patch
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ diff --git a/bench/bench.h b/bench/bench.h
index af1c839..661e8df 100644
--- a/bench/bench.h
+++ b/bench/bench.h
@@ -120,45 +120,11 @@ static void
@@ -120,45 +120,13 @@ static void
bench_run(Bench *benches, size_t nBenches)
{
for (Bench *b = benches; b != benches + nBenches; ++b) {
Expand Down Expand Up @@ -43,7 +43,9 @@ index af1c839..661e8df 100644
- print(f,bench_time(n, *i, *b))(",")(flush,);
- }
- print("],\n")(flush,);
+ *(int*)0x40000000 = 1;
+ bench_time(N, *i, *b);
+ *(int*)0x40000000 = 2;
}
- print("]\n},\n");
}
Expand Down
2 changes: 1 addition & 1 deletion tests/t1.ld
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ MEMORY {
SCALAR (RWX) : ORIGIN = 0x20000000, LENGTH = 512M /* put first to set it as default */
MMIO (RW) : ORIGIN = 0x00000000, LENGTH = 512M
DDR (RW) : ORIGIN = 0x40000000, LENGTH = 2048M
SRAM (RW) : ORIGIN = 0xc0000000, LENGTH = 4M /* TODO: read from config */
SRAM (RW) : ORIGIN = 0xc0000000, LENGTH = 800M /* TODO: read from config */
}

SECTIONS {
Expand Down
32 changes: 32 additions & 0 deletions tests/t1_main.S
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,38 @@ _start:
csrs mstatus, a0
csrwi vcsr, 0

li x1, 0
li x2, 0
li x3, 0
li x4, 0
li x5, 0
li x6, 0
li x7, 0
li x8, 0
li x9, 0
li x10, 0
li x11, 0
li x12, 0
li x13, 0
li x14, 0
li x15, 0
li x16, 0
li x17, 0
li x18, 0
li x19, 0
li x20, 0
li x21, 0
li x22, 0
li x23, 0
li x24, 0
li x25, 0
li x26, 0
li x27, 0
li x28, 0
li x29, 0
li x30, 0
li x31, 0

la sp, __stacktop

// no ra to save
Expand Down