AD7616: Add AXI ADC support #1477
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PIoandan
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sarpadi
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library/axi_ad7616/axi_ad7616_pif.v
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| @@ -67,7 +82,7 @@ module axi_ad7616_pif #( | |||
| input rd_req, | |||
| input wr_req, | |||
| input [15:0] wr_data, | |||
| output reg [15:0] rd_data, | |||
| output reg [15:0] rd_data = 'ha1b2, | |||
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Remove / fix initialization
library/axi_ad7616/axi_ad7616_pif.v
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| @@ -96,10 +111,20 @@ module axi_ad7616_pif #( | |||
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| reg rd_valid_d = 1'h0; | |||
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| reg [ 4:0] channel_counter = 5'h0; | |||
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fix spacing, separate reg from wire reclarations, initializations
library/axi_ad7616/axi_ad7616_pif.v
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| rd_req_edge_d <= rd_req_edge; | ||
| end | ||
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| //channel_counter |
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irrelevant comment. delete or elaborate
library/axi_ad7616/axi_ad7616.v
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| wire [255:0] adc_data_s; | ||
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| wire [ 7:0] adc_custom_control; |
library/axi_ad7616/axi_ad7616.v
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| end | ||
| endgenerate | ||
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| axi_ad7616_pif #( |
library/axi_ad7616/axi_ad7616.v
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| assign adc_data_1 = dma_data[14*16+15:14*16]; | ||
| assign adc_data_0 = dma_data[15*16+15:15*16]; | ||
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| wire [31:0] adc_config_ctrl; |
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Update system_project.tcl with newer build parameter handling |
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fix conflicts |
sarpadi
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remove 100MHz clock gen core and use PS clk (sys_clk) instead
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Signed-off-by: Pop Ioan Daniel <[email protected]>
Signed-off-by: Pop Ioan Daniel <[email protected]>
Signed-off-by: Pop Ioan Daniel <[email protected]>
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Made a squash for all three categories of files. |
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PR Description
Add AXI ADC support to existing AD7616 PIF project.
Update AD7616 project to account for the changes (add CPACK core, fix DMA connections).
Update AXI_AD7616 and AD7616 (project) documentation and block diagrams
PR Type
PR Checklist