feat: update project tt_um_ks_pyamnihc from pyamnihc/tt06_um_ks_pyamnihc

Commit: 26b00f4b5be491b993244667f175b148313f6a84
Workflow: https://github.com/pyamnihc/tt06_um_ks_pyamnihc/actions/runs/8743491773

projects/tt_um_ks_pyamnihc/LICENSE

@@ -0,0 +1,201 @@
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projects/tt_um_ks_pyamnihc/commit_id.json

@@ -0,0 +1,9 @@
+{
+  "app": "Tiny Tapeout tt06 c74b14ac",
+  "repo": "https://github.com/pyamnihc/tt06_um_ks_pyamnihc",
+  "commit": "26b00f4b5be491b993244667f175b148313f6a84",
+  "workflow_url": "https://github.com/pyamnihc/tt06_um_ks_pyamnihc/actions/runs/8743491773",
+  "sort_id": 1713468750485,
+  "openlane_version": "OpenLane eaba5192c45aa333ab45216ce1773d75d539e9b3",
+  "pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"
+}

projects/tt_um_ks_pyamnihc/docs/info.md

@@ -0,0 +1,23 @@
+<!---
+
+This file is used to generate your project datasheet. Please fill in the information below and delete any unused
+sections.
+
+You can also include images in this folder and reference them in the markdown. Each image must be less than
+512 kb in size, and the combined size of all images must be less than 1 MB.
+-->
+
+## How it works
+
+This is simplified implementation of Karplus-Strong (KS) string synthesis based on papers, [Digital Synthesis of Plucked-String and Drum Timbres](https://doi.org/10.2307/3680062) and [Extensions of the Karplus-Strong Plucked-String Algorithm](https://doi.org/10.2307/3680063). 
+
+A register map controls and configures the KS synthesis module. This register map is accessed through a SPI interface. Synthesized sound samples are sent out through the I2S transmitter interface.
+
+## How to test
+
+Connect a clock with frequency `f_clk = 256 kHz` and apply a reset cycle to initialize the design, this sets the audio sample rate at `fs = 16 kHz`. Use the spi register map or the `ui_in` to futher configure the design. The synthesized samples are sent continuously through the I2S transmitter interface.
+
+## External hardware
+
+An I2S DAC
+The 8-bit signed sound samples are sent out at `f_sck = 256 kHz` through this interface.

projects/tt_um_ks_pyamnihc/info.yaml

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+# Tiny Tapeout project information
+project:
+  title:        "Karplus-Strong String Synthesis"      # Project title
+  author:       "Chinmay Patil"      # Your name
+  discord:      ""      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
+  description:  "A KS String Audio Synthesizer "      # One line description of what your project does
+  language:     "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
+  clock_hz:     256000       # Clock frequency in Hz (or 0 if not applicable)
+
+  # How many tiles your design occupies? A single tile is about 167x108 uM.
+  tiles: "2x2"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2
+
+  # Your top module name must start with "tt_um_". Make it unique by including your github username:
+  top_module:  "tt_um_ks_pyamnihc"
+
+  # List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line:
+  source_files:        
+    - tt_um_ks_pyamnihc.v
+    - spi_slave_mem_interface.v
+    - register_map.v
+    - prbs15.v
+    - prbs7.v
+    - i2s_tx.v
+    - ks_string.v
+
+# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
+pinout:
+  # Inputs
+  ui[0]: "~rst_n_prbs_15, ~rst_n_prbs_7"
+  ui[1]: "load_prbs_15, load_prbs_7"
+  ui[2]: "freeze_prbs_15"
+  ui[3]: "freeze_prbs_7"
+  ui[4]: "i2s_noise_sel"
+  ui[5]: "~rst_n_ks_string"
+  ui[6]: "pluck"
+  ui[7]: ""
+
+  # Outputs
+  uo[0]: ""
+  uo[1]: ""
+  uo[2]: ""
+  uo[3]: ""
+  uo[4]: ""
+  uo[5]: ""
+  uo[6]: ""
+  uo[7]: ""
+
+  # Bidirectional pins
+  uio[0]: "sck_i"
+  uio[1]: "sdi_i"
+  uio[2]: "sdo_o"
+  uio[3]: "cs_ni"
+  uio[4]: "i2s_sck_o"
+  uio[5]: "i2s_ws_o"
+  uio[6]: "i2s_sd_o"
+  uio[7]: "prbs_15"
+
+# Do not change!
+yaml_version: 6

projects/tt_um_ks_pyamnihc/stats/metrics.csv

@@ -0,0 +1,2 @@
+design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
+/work/src,tt_um_ks_pyamnihc,wokwi,flow completed,0h6m16s0ms,0h5m5s0ms,115895.62488169705,0.0756025088,57947.812440848524,59.76,57.1574,696.97,4196,0,0,0,0,0,0,0,0,0,0,-1,-1,112667,29546,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,86927258.0,0.0,56.06,39.56,9.56,4.75,-1,3545,4939,222,1595,0,0,0,3935,92,1,72,193,588,480,232,176,520,544,52,3241,1037,8,1807,4381,10474,72564.5952,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0

projects/tt_um_ks_pyamnihc/stats/synthesis-stats.txt

@@ -0,0 +1,85 @@
+
+69. Printing statistics.
+
+=== tt_um_ks_pyamnihc ===
+
+   Number of wires:               4180
+   Number of wire bits:           4215
+   Number of public wires:         526
+   Number of public wire bits:     561
+   Number of memories:               0
+   Number of memory bits:            0
+   Number of processes:              0
+   Number of cells:               4196
+     sky130_fd_sc_hd__a2111o_2       2
+     sky130_fd_sc_hd__a2111oi_2      3
+     sky130_fd_sc_hd__a211o_2       26
+     sky130_fd_sc_hd__a211oi_2       6
+     sky130_fd_sc_hd__a21bo_2       22
+     sky130_fd_sc_hd__a21boi_2       8
+     sky130_fd_sc_hd__a21o_2        88
+     sky130_fd_sc_hd__a21oi_2       87
+     sky130_fd_sc_hd__a221o_2       76
+     sky130_fd_sc_hd__a221oi_2       9
+     sky130_fd_sc_hd__a22o_2       122
+     sky130_fd_sc_hd__a22oi_2        5
+     sky130_fd_sc_hd__a2bb2o_2       4
+     sky130_fd_sc_hd__a2bb2oi_2      1
+     sky130_fd_sc_hd__a311o_2        2
+     sky130_fd_sc_hd__a31o_2        40
+     sky130_fd_sc_hd__a31oi_2        6
+     sky130_fd_sc_hd__a32o_2         6
+     sky130_fd_sc_hd__a41o_2         3
+     sky130_fd_sc_hd__and2_2       184
+     sky130_fd_sc_hd__and2b_2       62
+     sky130_fd_sc_hd__and3_2       353
+     sky130_fd_sc_hd__and3b_2        7
+     sky130_fd_sc_hd__and4_2        14
+     sky130_fd_sc_hd__and4b_2       14
+     sky130_fd_sc_hd__and4bb_2       5
+     sky130_fd_sc_hd__buf_1        547
+     sky130_fd_sc_hd__buf_2         13
+     sky130_fd_sc_hd__conb_1        11
+     sky130_fd_sc_hd__dfrtp_2       32
+     sky130_fd_sc_hd__dfxtp_2      478
+     sky130_fd_sc_hd__inv_2         65
+     sky130_fd_sc_hd__mux2_2       267
+     sky130_fd_sc_hd__nand2_2      320
+     sky130_fd_sc_hd__nand2b_2       4
+     sky130_fd_sc_hd__nand3_2       26
+     sky130_fd_sc_hd__nand3b_2       1
+     sky130_fd_sc_hd__nand4_2        4
+     sky130_fd_sc_hd__nand4b_2       3
+     sky130_fd_sc_hd__nor2_2       249
+     sky130_fd_sc_hd__nor2b_2        4
+     sky130_fd_sc_hd__nor3_2        31
+     sky130_fd_sc_hd__nor3b_2        3
+     sky130_fd_sc_hd__nor4_2         1
+     sky130_fd_sc_hd__o2111a_2       2
+     sky130_fd_sc_hd__o2111ai_2      1
+     sky130_fd_sc_hd__o211a_2       76
+     sky130_fd_sc_hd__o211ai_2       5
+     sky130_fd_sc_hd__o21a_2        77
+     sky130_fd_sc_hd__o21ai_2       80
+     sky130_fd_sc_hd__o21ba_2       25
+     sky130_fd_sc_hd__o21bai_2       5
+     sky130_fd_sc_hd__o221a_2       10
+     sky130_fd_sc_hd__o22a_2        28
+     sky130_fd_sc_hd__o22ai_2       11
+     sky130_fd_sc_hd__o2bb2a_2      10
+     sky130_fd_sc_hd__o311a_2        1
+     sky130_fd_sc_hd__o31a_2         4
+     sky130_fd_sc_hd__o31ai_2        4
+     sky130_fd_sc_hd__o32a_2         5
+     sky130_fd_sc_hd__o41a_2         1
+     sky130_fd_sc_hd__or2_2        161
+     sky130_fd_sc_hd__or2b_2        32
+     sky130_fd_sc_hd__or3_2         44
+     sky130_fd_sc_hd__or3b_2        10
+     sky130_fd_sc_hd__or4_2         12
+     sky130_fd_sc_hd__or4b_2         1
+     sky130_fd_sc_hd__xnor2_2      243
+     sky130_fd_sc_hd__xor2_2       134
+
+   Chip area for module '\tt_um_ks_pyamnihc': 42222.995200
+