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Add 74125,74126,74244 buffers #5

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Add 74125,74126,74244 buffers #5

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3 changes: 3 additions & 0 deletions device-index.md
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## Buffers, Inverters
[7404](source-7400/7404.v) Hex inverter<br />
[7407](source-7400/7407.v) Hex buffer/driver (OC)<br />
[74125](source-7400/74125.v) Quad bus buffer, negative enable<br />
[74126](source-7400/74126.v) Quad bus buffer, positive enable<br />
[74244](source-7400/74244.v) Octal buffer with 3-state output<br />

## Gates
[7400](source-7400/7400.v) Quad 2-input NAND gate<br />
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23 changes: 23 additions & 0 deletions source-7400/74125.v
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// Quad bus buffer, negative enable

module ttl_74125 #(parameter BLOCKS = 4, DELAY_RISE = 0, DELAY_FALL = 0)
(
input [BLOCKS-1:0] C,
input [BLOCKS-1:0] A,
output [BLOCKS-1:0] Y
);

//------------------------------------------------//
integer i;
reg [BLOCKS-1:0] computed;

always @(*)
begin
for (i = 0; i < BLOCKS; i++)
computed[i] = C[i] ? 1'bZ : A[i];
end
//------------------------------------------------//

assign #(DELAY_RISE, DELAY_FALL) Y = computed;

endmodule
23 changes: 23 additions & 0 deletions source-7400/74126.v
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// Quad bus buffer, positive enable

module ttl_74126 #(parameter BLOCKS = 4, DELAY_RISE = 0, DELAY_FALL = 0)
(
input [BLOCKS-1:0] C,
input [BLOCKS-1:0] A,
output [BLOCKS-1:0] Y
);

//------------------------------------------------//
integer i;
reg [BLOCKS-1:0] computed;

always @(*)
begin
for (i = 0; i < BLOCKS; i++)
computed[i] = C[i] ? A[i] : 1'bZ;
end
//------------------------------------------------//

assign #(DELAY_RISE, DELAY_FALL) Y = computed;

endmodule
23 changes: 23 additions & 0 deletions source-7400/74244.v
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// Octal buffer with 3-state output

module ttl_74244 #(parameter WIDTH = 8, DELAY_RISE = 0, DELAY_FALL = 0)
(
input [(WIDTH-1)/4:0] G_bar,
input [WIDTH-1:0] A,
output [WIDTH-1:0] Y
);

//------------------------------------------------//
integer i;
reg [WIDTH-1:0] computed;

always @(*)
begin
for (i = 0; i < WIDTH; i++)
computed[i] = G_bar[i/4] ? 1'bZ : A[i];
end
//------------------------------------------------//

assign #(DELAY_RISE, DELAY_FALL) Y = computed;

endmodule