mem-cache: add l2l3 tag readlimit, add store stall when writing cache #203
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And optimize the behavior of read tag fail retry, no need to modify lsqunit |
happy-lx
reviewed
Nov 15, 2024
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| bool isWriteBlock(Addr addr) { | ||
| return lastWriteFinishTick[getBank(addr)] > curTick(); | ||
| } |
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RTL's SRAM only blocks all read requests during the single writing cycle. It seems that isWriteBlock blocks all requests from the time the write request is received to the completion of writing?
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