FPGA developer.
This repositories consists of many components of MasterPlayer foundation
Pinned Loading
-
adxl345-sv
adxl345-sv PublicFPGA implemented component for realize register file in FPGA resources with request and sends data to ADXL345 device
C 3
-
-
-
-
lcd-st7789-sv
lcd-st7789-sv Publicsimple demo hardware code for implement access to ST7789 LCD display from FPGA
VHDL 4
-
rmii-ethernet-mac
rmii-ethernet-mac PublicRMII interface ethernet MAC Core for 10/100 MBit ethernet implementation with support CDC and AXI-Stream BUS without management and without MDIO interface support
VHDL 9
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.