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i2c: stm32: Clang format
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Clang format

Signed-off-by: Simon Gilbert <[email protected]>
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sgilbert182 committed Nov 26, 2024
1 parent d1786fe commit 057bc2b
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Showing 2 changed files with 297 additions and 337 deletions.
263 changes: 125 additions & 138 deletions drivers/i2c/i2c_ll_stm32.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,16 +65,13 @@ int i2c_stm32_get_config(const struct device *dev, uint32_t *config)
/* I2C BIT RATE */
if (data->current_timing.i2c_speed == 100000) {
LOG_INF("timings = <%d I2C_BITRATE_STANDARD 0x%X>;",
data->current_timing.periph_clock,
data->current_timing.timing_setting);
data->current_timing.periph_clock, data->current_timing.timing_setting);
} else if (data->current_timing.i2c_speed == 400000) {
LOG_INF("timings = <%d I2C_BITRATE_FAST 0x%X>;",
data->current_timing.periph_clock,
LOG_INF("timings = <%d I2C_BITRATE_FAST 0x%X>;", data->current_timing.periph_clock,
data->current_timing.timing_setting);
} else if (data->current_timing.i2c_speed == 1000000) {
LOG_INF("timings = <%d I2C_SPEED_FAST_PLUS 0x%X>;",
data->current_timing.periph_clock,
data->current_timing.timing_setting);
data->current_timing.periph_clock, data->current_timing.timing_setting);
}
#endif /* CONFIG_I2C_STM32_V2_TIMING */

Expand Down Expand Up @@ -139,10 +136,10 @@ int i2c_stm32_runtime_configure(const struct device *dev, uint32_t config)
return ret;
}

#define OPERATION(msg) (((struct i2c_msg *) msg)->flags & I2C_MSG_RW_MASK)
#define OPERATION(msg) (((struct i2c_msg *)msg)->flags & I2C_MSG_RW_MASK)

static int i2c_stm32_transfer(const struct device *dev, struct i2c_msg *msg,
uint8_t num_msgs, uint16_t slave)
static int i2c_stm32_transfer(const struct device *dev, struct i2c_msg *msg, uint8_t num_msgs,
uint16_t slave)
{
struct i2c_stm32_data *data = dev->data;
struct i2c_msg *current;
Expand Down Expand Up @@ -366,16 +363,14 @@ static int i2c_stm32_activate(const struct device *dev)
}

/* Enable device clock. */
if (clock_control_on(clk,
(clock_control_subsys_t) &cfg->pclken[0]) != 0) {
if (clock_control_on(clk, (clock_control_subsys_t)&cfg->pclken[0]) != 0) {
LOG_ERR("i2c: failure enabling clock");
return -EIO;
}

return 0;
}


static int i2c_stm32_init(const struct device *dev)
{
const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
Expand Down Expand Up @@ -412,9 +407,7 @@ static int i2c_stm32_init(const struct device *dev)

if (IS_ENABLED(STM32_I2C_DOMAIN_CLOCK_SUPPORT) && (cfg->pclk_len > 1)) {
/* Enable I2C clock source */
ret = clock_control_configure(clk,
(clock_control_subsys_t) &cfg->pclken[1],
NULL);
ret = clock_control_configure(clk, (clock_control_subsys_t)&cfg->pclken[1], NULL);
if (ret < 0) {
return -EIO;
}
Expand Down Expand Up @@ -539,46 +532,46 @@ void i2c_stm32_smbalert_disable(const struct device *dev)

#ifdef CONFIG_I2C_DMA
/* This function is executed in the interrupt context */
static void dma_rx_callback(const struct device *dma_dev, void *user_data,
uint32_t channel, int status)
static void dma_rx_callback(const struct device *dma_dev, void *user_data, uint32_t channel,
int status)
{
struct i2c_stm32_data *data = (struct i2c_stm32_data *)user_data;

switch (status) {
case DMA_STATUS_COMPLETE:
data->current.is_err = 0;
dma_stop(dma_dev, channel);
break;
case DMA_STATUS_BLOCK:
break;
default:
data->current.is_err = 1;
break;
}

k_sem_give(&data->device_sync_sem);
struct i2c_stm32_data *data = (struct i2c_stm32_data *)user_data;

switch (status) {
case DMA_STATUS_COMPLETE:
data->current.is_err = 0;
dma_stop(dma_dev, channel);
break;
case DMA_STATUS_BLOCK:
break;
default:
data->current.is_err = 1;
break;
}

k_sem_give(&data->device_sync_sem);
}

/* This function is executed in the interrupt context */
static void dma_tx_callback(const struct device *dma_dev, void *user_data,
uint32_t channel, int status)
static void dma_tx_callback(const struct device *dma_dev, void *user_data, uint32_t channel,
int status)
{
struct i2c_stm32_data *data = (struct i2c_stm32_data *)user_data;

switch (status) {
case DMA_STATUS_COMPLETE:
data->current.is_err = 0;
dma_stop(dma_dev, channel);
break;
case DMA_STATUS_BLOCK:
break;
default:
data->current.is_err = 1;
break;
}

LOG_DBG("Giving semaphore");
k_sem_give(&data->device_sync_sem);
struct i2c_stm32_data *data = (struct i2c_stm32_data *)user_data;

switch (status) {
case DMA_STATUS_COMPLETE:
data->current.is_err = 0;
dma_stop(dma_dev, channel);
break;
case DMA_STATUS_BLOCK:
break;
default:
data->current.is_err = 1;
break;
}

LOG_DBG("Giving semaphore");
k_sem_give(&data->device_sync_sem);
}

#endif /* CONFIG_I2C_DMA */
Expand All @@ -588,40 +581,35 @@ static void dma_tx_callback(const struct device *dma_dev, void *user_data,
#ifdef CONFIG_I2C_STM32_INTERRUPT

#ifdef CONFIG_I2C_STM32_COMBINED_INTERRUPT
#define STM32_I2C_IRQ_CONNECT_AND_ENABLE(index) \
do { \
IRQ_CONNECT(DT_INST_IRQN(index), \
DT_INST_IRQ(index, priority), \
stm32_i2c_combined_isr, \
DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_INST_IRQN(index)); \
#define STM32_I2C_IRQ_CONNECT_AND_ENABLE(index) \
do { \
IRQ_CONNECT(DT_INST_IRQN(index), DT_INST_IRQ(index, priority), \
stm32_i2c_combined_isr, DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_INST_IRQN(index)); \
} while (false)
#else
#define STM32_I2C_IRQ_CONNECT_AND_ENABLE(index) \
do { \
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, event, irq), \
DT_INST_IRQ_BY_NAME(index, event, priority),\
stm32_i2c_event_isr, \
DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_INST_IRQ_BY_NAME(index, event, irq)); \
\
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, error, irq), \
DT_INST_IRQ_BY_NAME(index, error, priority),\
stm32_i2c_error_isr, \
DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_INST_IRQ_BY_NAME(index, error, irq)); \
#define STM32_I2C_IRQ_CONNECT_AND_ENABLE(index) \
do { \
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, event, irq), \
DT_INST_IRQ_BY_NAME(index, event, priority), stm32_i2c_event_isr, \
DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_INST_IRQ_BY_NAME(index, event, irq)); \
\
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, error, irq), \
DT_INST_IRQ_BY_NAME(index, error, priority), stm32_i2c_error_isr, \
DEVICE_DT_INST_GET(index), 0); \
irq_enable(DT_INST_IRQ_BY_NAME(index, error, irq)); \
} while (false)
#endif /* CONFIG_I2C_STM32_COMBINED_INTERRUPT */

#define STM32_I2C_IRQ_HANDLER_DECL(index) \
static void i2c_stm32_irq_config_func_##index(const struct device *dev)
#define STM32_I2C_IRQ_HANDLER_FUNCTION(index) \
.irq_config_func = i2c_stm32_irq_config_func_##index,
#define STM32_I2C_IRQ_HANDLER(index) \
static void i2c_stm32_irq_config_func_##index(const struct device *dev) \
{ \
STM32_I2C_IRQ_CONNECT_AND_ENABLE(index); \
}
#define STM32_I2C_IRQ_HANDLER_DECL(index) \
static void i2c_stm32_irq_config_func_##index(const struct device *dev)
#define STM32_I2C_IRQ_HANDLER_FUNCTION(index) .irq_config_func = i2c_stm32_irq_config_func_##index,
#define STM32_I2C_IRQ_HANDLER(index) \
static void i2c_stm32_irq_config_func_##index(const struct device *dev) \
{ \
STM32_I2C_IRQ_CONNECT_AND_ENABLE(index); \
}
#else

#define STM32_I2C_IRQ_HANDLER_DECL(index)
Expand All @@ -633,32 +621,35 @@ static void i2c_stm32_irq_config_func_##index(const struct device *dev) \
#ifdef CONFIG_I2C_DMA

#define I2C_DMA_INIT(index, dir) \
.dev_dma_##dir = COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \
(DEVICE_DT_GET(STM32_DMA_CTLR(index, dir))), (NULL)), \
.dma_##dir##_channel = COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \
.dev_dma_##dir = COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \

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(DEVICE_DT_GET(STM32_DMA_CTLR(index, dir))), (NULL)), \

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.dma_##dir##_channel = COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \

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drivers/i2c/i2c_ll_stm32.c:626 - (DEVICE_DT_GET(STM32_DMA_CTLR(index, dir))), (NULL)), \ + (DEVICE_DT_GET(STM32_DMA_CTLR(index, dir))), (NULL)), \
(DT_INST_DMAS_CELL_BY_NAME(index, dir, channel)), (-1)),

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#define I2C_DMA_SLOT_INIT(index, dir) \
.dma_slot = COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \
.dma_slot = COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \

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(DT_INST_DMAS_CELL_BY_NAME(index, dir, slot)), (0))

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#define I2C_DMA_CFG_INIT(index, name, dir, src, dest, src_addr_incr, dest_addr_incr) \
.dma_##dir##_cfg = { \
I2C_DMA_SLOT_INIT(index, dir), \
.channel_direction = STM32_DMA_CONFIG_DIRECTION(STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.source_data_size = STM32_DMA_CONFIG_##src##_DATA_SIZE( \
STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.dest_data_size = STM32_DMA_CONFIG_##dest##_DATA_SIZE( \
STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.source_burst_length = 1, \
.dest_burst_length = 1, \
.channel_priority = STM32_DMA_CONFIG_PRIORITY(STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.dma_callback = dma_##dir##_callback, \
}, \
.dma_##dir##_blk_cfg = { \
.source_addr_adj = src_addr_incr, \
.dest_addr_adj = dest_addr_incr, \
},
.dma_##dir##_cfg = \
{ \
I2C_DMA_SLOT_INIT(index, dir), \
.channel_direction = \
STM32_DMA_CONFIG_DIRECTION(STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.source_data_size = STM32_DMA_CONFIG_##src##_DATA_SIZE( \
STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.dest_data_size = STM32_DMA_CONFIG_##dest##_DATA_SIZE( \
STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.source_burst_length = 1, \
.dest_burst_length = 1, \
.channel_priority = \
STM32_DMA_CONFIG_PRIORITY(STM32_DMA_CHANNEL_CONFIG(index, dir)), \
.dma_callback = dma_##dir##_callback, \
}, \
.dma_##dir##_blk_cfg = { \
.source_addr_adj = src_addr_incr, \
.dest_addr_adj = dest_addr_incr, \
},

#else

Expand All @@ -670,46 +661,42 @@ static void i2c_stm32_irq_config_func_##index(const struct device *dev) \

#endif

#define STM32_I2C_INIT(index) \
STM32_I2C_IRQ_HANDLER_DECL(index); \
\
IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2), \
(static const uint32_t i2c_timings_##index[] = \
DT_INST_PROP_OR(index, timings, {});)) \
\
PINCTRL_DT_INST_DEFINE(index); \
\
static const struct stm32_pclken pclken_##index[] = \
STM32_DT_INST_CLOCKS(index); \
\
static const struct i2c_stm32_config i2c_stm32_cfg_##index = { \
.i2c = (I2C_TypeDef *)DT_INST_REG_ADDR(index), \
.pclken = pclken_##index, \
.pclk_len = DT_INST_NUM_CLOCKS(index), \
STM32_I2C_IRQ_HANDLER_FUNCTION(index) \
.bitrate = DT_INST_PROP(index, clock_frequency), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
IF_ENABLED(CONFIG_I2C_STM32_BUS_RECOVERY, \
#define STM32_I2C_INIT(index) \

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STM32_I2C_IRQ_HANDLER_DECL(index); \

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\

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IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2), \
(static const uint32_t i2c_timings_##index[] = \
DT_INST_PROP_OR(index, timings, {});)) \
\
PINCTRL_DT_INST_DEFINE(index); \
\
static const struct stm32_pclken pclken_##index[] = STM32_DT_INST_CLOCKS(index); \
\
static const struct i2c_stm32_config i2c_stm32_cfg_##index = { \
.i2c = (I2C_TypeDef *)DT_INST_REG_ADDR(index), \
.pclken = pclken_##index, \
.pclk_len = DT_INST_NUM_CLOCKS(index), \
STM32_I2C_IRQ_HANDLER_FUNCTION(index).bitrate = \
DT_INST_PROP(index, clock_frequency), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
IF_ENABLED(CONFIG_I2C_STM32_BUS_RECOVERY, \
(.scl = GPIO_DT_SPEC_INST_GET_OR(index, scl_gpios, {0}),\
.sda = GPIO_DT_SPEC_INST_GET_OR(index, sda_gpios, {0}),))\
IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2), \
.sda = GPIO_DT_SPEC_INST_GET_OR(index, sda_gpios, {0}),)) \
IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2), \
(.timings = (const struct i2c_config_timing *) i2c_timings_##index,\
.n_timings = ARRAY_SIZE(i2c_timings_##index),)) \
I2C_DMA_INIT(index, tx) \
I2C_DMA_INIT(index, rx) \
}; \
\
static struct i2c_stm32_data i2c_stm32_dev_data_##index; \
\
PM_DEVICE_DT_INST_DEFINE(index, i2c_stm32_pm_action); \
\
I2C_DEVICE_DT_INST_DEFINE(index, i2c_stm32_init, \
PM_DEVICE_DT_INST_GET(index), \
&i2c_stm32_dev_data_##index, \
&i2c_stm32_cfg_##index, \
POST_KERNEL, CONFIG_I2C_INIT_PRIORITY, \
&api_funcs); \
\
STM32_I2C_IRQ_HANDLER(index)
.n_timings = ARRAY_SIZE(i2c_timings_##index),)) \
I2C_DMA_INIT(index, tx) \
I2C_DMA_INIT(index, \
rx)}; \
\
static struct i2c_stm32_data i2c_stm32_dev_data_##index; \
\
PM_DEVICE_DT_INST_DEFINE(index, i2c_stm32_pm_action); \
\
I2C_DEVICE_DT_INST_DEFINE(index, i2c_stm32_init, PM_DEVICE_DT_INST_GET(index), \
&i2c_stm32_dev_data_##index, &i2c_stm32_cfg_##index, \
POST_KERNEL, CONFIG_I2C_INIT_PRIORITY, &api_funcs); \
\
STM32_I2C_IRQ_HANDLER(index)

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drivers/i2c/i2c_ll_stm32.c:700 -#define STM32_I2C_INIT(index) \ - STM32_I2C_IRQ_HANDLER_DECL(index); \ - \ +#define STM32_I2C_INIT(index) \ + STM32_I2C_IRQ_HANDLER_DECL(index); \ + \ IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2), \ (static const uint32_t i2c_timings_##index[] = \ - DT_INST_PROP_OR(index, timings, {});)) \ - \ - PINCTRL_DT_INST_DEFINE(index); \ - \ - static const struct stm32_pclken pclken_##index[] = STM32_DT_INST_CLOCKS(index); \ - \ - static const struct i2c_stm32_config i2c_stm32_cfg_##index = { \ - .i2c = (I2C_TypeDef *)DT_INST_REG_ADDR(index), \ - .pclken = pclken_##index, \ - .pclk_len = DT_INST_NUM_CLOCKS(index), \ - STM32_I2C_IRQ_HANDLER_FUNCTION(index).bitrate = \ - DT_INST_PROP(index, clock_frequency), \ - .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \ + DT_INST_PROP_OR(index, timings, {});)) \ + \ + PINCTRL_DT_INST_DEFINE(index); \ + \ + static const struct stm32_pclken pclken_##index[] = STM32_DT_INST_CLOCKS(index); \ + \ + static const struct i2c_stm32_config i2c_stm32_cfg_##index = { \ + .i2c = (I2C_TypeDef *)DT_INST_REG_ADDR(index), \ + .pclken = pclken_##index, \ + .pclk_len = DT_INST_NUM_CLOCKS(index), \ + STM32_I2C_IRQ_HANDLER_FUNCTION(index).bitrate = \ + DT_INST_PROP(index, clock_frequency), \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \ IF_ENABLED(CONFIG_I2C_STM32_BUS_RECOVERY, \ (.scl = GPIO_DT_SPEC_INST_GET_OR(index, scl_gpios, {0}),\ - .sda = GPIO_DT_SPEC_INST_GET_OR(index, sda_gpios, {0}),)) \ + .sda = GPIO_DT_SPEC_INST_GET_OR(index, sda_gpios, {0}),)) \ IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2), \ (.timings = (const struct i2c_config_timing *) i2c_timings_##index,\ - .n_timings = ARRAY_SIZE(i2c_timings_##index),)) \ - I2C_DMA_INIT(index, tx) \ - I2C_DMA_INIT(index, \ - rx)}; \ - \ - static struct i2c_stm

DT_INST_FOREACH_STATUS_OKAY(STM32_I2C_INIT)
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