From 3b071abfe8d4b553928dfaee25f057d1cab5272a Mon Sep 17 00:00:00 2001 From: Glenn Baker Date: Wed, 24 Apr 2024 11:43:32 +0200 Subject: [PATCH] bindings: regenerate constants for AVR support. Signed-off-by: Glenn Baker --- bindings/dotnet/UnicornEngine/Const/AVR.fs | 155 ++++++++++++++++++ bindings/dotnet/UnicornEngine/Const/Common.fs | 3 +- bindings/go/unicorn/avr_const.go | 150 +++++++++++++++++ bindings/go/unicorn/unicorn_const.go | 3 +- .../java/src/main/java/unicorn/AVRConst.java | 153 +++++++++++++++++ .../src/main/java/unicorn/UnicornConst.java | 3 +- bindings/pascal/unicorn/AVRConst.pas | 155 ++++++++++++++++++ bindings/pascal/unicorn/UnicornConst.pas | 3 +- bindings/python/unicorn/avr_const.py | 147 +++++++++++++++++ bindings/python/unicorn/unicorn_const.py | 3 +- .../lib/unicorn_engine/avr_const.rb | 150 +++++++++++++++++ .../lib/unicorn_engine/unicorn_const.rb | 3 +- bindings/zig/unicorn/unicorn_const.zig | 3 +- 13 files changed, 924 insertions(+), 7 deletions(-) create mode 100644 bindings/dotnet/UnicornEngine/Const/AVR.fs create mode 100644 bindings/go/unicorn/avr_const.go create mode 100644 bindings/java/src/main/java/unicorn/AVRConst.java create mode 100644 bindings/pascal/unicorn/AVRConst.pas create mode 100644 bindings/python/unicorn/avr_const.py create mode 100644 bindings/ruby/unicorn_gem/lib/unicorn_engine/avr_const.rb diff --git a/bindings/dotnet/UnicornEngine/Const/AVR.fs b/bindings/dotnet/UnicornEngine/Const/AVR.fs new file mode 100644 index 0000000000..d7613dac85 --- /dev/null +++ b/bindings/dotnet/UnicornEngine/Const/AVR.fs @@ -0,0 +1,155 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +namespace UnicornEngine.Const + +open System + +[] +module AVR = + + // AVR architectures + let UC_AVR_ARCH_AVR1 = 10 + let UC_AVR_ARCH_AVR2 = 20 + let UC_AVR_ARCH_AVR25 = 25 + let UC_AVR_ARCH_AVR3 = 30 + let UC_AVR_ARCH_AVR4 = 40 + let UC_AVR_ARCH_AVR5 = 50 + let UC_AVR_ARCH_AVR51 = 51 + let UC_AVR_ARCH_AVR6 = 60 + let UC_CPU_AVR_ARCH = 1000 + + // AVR CPU + let UC_CPU_AVR_ATMEGA16 = 50016 + let UC_CPU_AVR_ATMEGA32 = 50032 + let UC_CPU_AVR_ATMEGA64 = 50064 + let UC_CPU_AVR_ATMEGA128 = 51128 + let UC_CPU_AVR_ATMEGA128RFR2 = 51129 + let UC_CPU_AVR_ATMEGA1280 = 51130 + let UC_CPU_AVR_ATMEGA256 = 60256 + let UC_CPU_AVR_ATMEGA256RFR2 = 60257 + let UC_CPU_AVR_ATMEGA2560 = 60258 + + // AVR memory + let UC_AVR_MEM_FLASH = 134217728 + + // AVR registers + + let UC_AVR_REG_INVALID = 0 + let UC_AVR_REG_R0 = 1 + let UC_AVR_REG_R1 = 2 + let UC_AVR_REG_R2 = 3 + let UC_AVR_REG_R3 = 4 + let UC_AVR_REG_R4 = 5 + let UC_AVR_REG_R5 = 6 + let UC_AVR_REG_R6 = 7 + let UC_AVR_REG_R7 = 8 + let UC_AVR_REG_R8 = 9 + let UC_AVR_REG_R9 = 10 + let UC_AVR_REG_R10 = 11 + let UC_AVR_REG_R11 = 12 + let UC_AVR_REG_R12 = 13 + let UC_AVR_REG_R13 = 14 + let UC_AVR_REG_R14 = 15 + let UC_AVR_REG_R15 = 16 + let UC_AVR_REG_R16 = 17 + let UC_AVR_REG_R17 = 18 + let UC_AVR_REG_R18 = 19 + let UC_AVR_REG_R19 = 20 + let UC_AVR_REG_R20 = 21 + let UC_AVR_REG_R21 = 22 + let UC_AVR_REG_R22 = 23 + let UC_AVR_REG_R23 = 24 + let UC_AVR_REG_R24 = 25 + let UC_AVR_REG_R25 = 26 + let UC_AVR_REG_R26 = 27 + let UC_AVR_REG_R27 = 28 + let UC_AVR_REG_R28 = 29 + let UC_AVR_REG_R29 = 30 + let UC_AVR_REG_R30 = 31 + let UC_AVR_REG_R31 = 32 + let UC_AVR_REG_PC = 33 + let UC_AVR_REG_SP = 34 + let UC_AVR_REG_RAMPD = 57 + let UC_AVR_REG_RAMPX = 58 + let UC_AVR_REG_RAMPY = 59 + let UC_AVR_REG_RAMPZ = 60 + let UC_AVR_REG_EIND = 61 + let UC_AVR_REG_SPL = 62 + let UC_AVR_REG_SPH = 63 + let UC_AVR_REG_SREG = 64 + + // 16-bit coalesced registers + let UC_AVR_REG_R0W = 65 + let UC_AVR_REG_R1W = 66 + let UC_AVR_REG_R2W = 67 + let UC_AVR_REG_R3W = 68 + let UC_AVR_REG_R4W = 69 + let UC_AVR_REG_R5W = 70 + let UC_AVR_REG_R6W = 71 + let UC_AVR_REG_R7W = 72 + let UC_AVR_REG_R8W = 73 + let UC_AVR_REG_R9W = 74 + let UC_AVR_REG_R10W = 75 + let UC_AVR_REG_R11W = 76 + let UC_AVR_REG_R12W = 77 + let UC_AVR_REG_R13W = 78 + let UC_AVR_REG_R14W = 79 + let UC_AVR_REG_R15W = 80 + let UC_AVR_REG_R16W = 81 + let UC_AVR_REG_R17W = 82 + let UC_AVR_REG_R18W = 83 + let UC_AVR_REG_R19W = 84 + let UC_AVR_REG_R20W = 85 + let UC_AVR_REG_R21W = 86 + let UC_AVR_REG_R22W = 87 + let UC_AVR_REG_R23W = 88 + let UC_AVR_REG_R24W = 89 + let UC_AVR_REG_R25W = 90 + let UC_AVR_REG_R26W = 91 + let UC_AVR_REG_R27W = 92 + let UC_AVR_REG_R28W = 93 + let UC_AVR_REG_R29W = 94 + let UC_AVR_REG_R30W = 95 + + // 32-bit coalesced registers + let UC_AVR_REG_R0D = 97 + let UC_AVR_REG_R1D = 98 + let UC_AVR_REG_R2D = 99 + let UC_AVR_REG_R3D = 100 + let UC_AVR_REG_R4D = 101 + let UC_AVR_REG_R5D = 102 + let UC_AVR_REG_R6D = 103 + let UC_AVR_REG_R7D = 104 + let UC_AVR_REG_R8D = 105 + let UC_AVR_REG_R9D = 106 + let UC_AVR_REG_R10D = 107 + let UC_AVR_REG_R11D = 108 + let UC_AVR_REG_R12D = 109 + let UC_AVR_REG_R13D = 110 + let UC_AVR_REG_R14D = 111 + let UC_AVR_REG_R15D = 112 + let UC_AVR_REG_R16D = 113 + let UC_AVR_REG_R17D = 114 + let UC_AVR_REG_R18D = 115 + let UC_AVR_REG_R19D = 116 + let UC_AVR_REG_R20D = 117 + let UC_AVR_REG_R21D = 118 + let UC_AVR_REG_R22D = 119 + let UC_AVR_REG_R23D = 120 + let UC_AVR_REG_R24D = 121 + let UC_AVR_REG_R25D = 122 + let UC_AVR_REG_R26D = 123 + let UC_AVR_REG_R27D = 124 + let UC_AVR_REG_R28D = 125 + + // Alias registers + let UC_AVR_REG_Xhi = 28 + let UC_AVR_REG_Xlo = 27 + let UC_AVR_REG_Yhi = 30 + let UC_AVR_REG_Ylo = 29 + let UC_AVR_REG_Zhi = 32 + let UC_AVR_REG_Zlo = 31 + let UC_AVR_REG_X = 91 + let UC_AVR_REG_Y = 93 + let UC_AVR_REG_Z = 95 + diff --git a/bindings/dotnet/UnicornEngine/Const/Common.fs b/bindings/dotnet/UnicornEngine/Const/Common.fs index 76f1ce118b..4b97dbdbb5 100644 --- a/bindings/dotnet/UnicornEngine/Const/Common.fs +++ b/bindings/dotnet/UnicornEngine/Const/Common.fs @@ -28,7 +28,8 @@ module Common = let UC_ARCH_RISCV = 8 let UC_ARCH_S390X = 9 let UC_ARCH_TRICORE = 10 - let UC_ARCH_MAX = 11 + let UC_ARCH_AVR = 11 + let UC_ARCH_MAX = 12 let UC_MODE_LITTLE_ENDIAN = 0 let UC_MODE_BIG_ENDIAN = 1073741824 diff --git a/bindings/go/unicorn/avr_const.go b/bindings/go/unicorn/avr_const.go new file mode 100644 index 0000000000..985bf7d009 --- /dev/null +++ b/bindings/go/unicorn/avr_const.go @@ -0,0 +1,150 @@ +package unicorn +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [avr_const.go] +const ( + +// AVR architectures + AVR_ARCH_AVR1 = 10 + AVR_ARCH_AVR2 = 20 + AVR_ARCH_AVR25 = 25 + AVR_ARCH_AVR3 = 30 + AVR_ARCH_AVR4 = 40 + AVR_ARCH_AVR5 = 50 + AVR_ARCH_AVR51 = 51 + AVR_ARCH_AVR6 = 60 + CPU_AVR_ARCH = 1000 + +// AVR CPU + CPU_AVR_ATMEGA16 = 50016 + CPU_AVR_ATMEGA32 = 50032 + CPU_AVR_ATMEGA64 = 50064 + CPU_AVR_ATMEGA128 = 51128 + CPU_AVR_ATMEGA128RFR2 = 51129 + CPU_AVR_ATMEGA1280 = 51130 + CPU_AVR_ATMEGA256 = 60256 + CPU_AVR_ATMEGA256RFR2 = 60257 + CPU_AVR_ATMEGA2560 = 60258 + +// AVR memory + AVR_MEM_FLASH = 134217728 + +// AVR registers + + AVR_REG_INVALID = 0 + AVR_REG_R0 = 1 + AVR_REG_R1 = 2 + AVR_REG_R2 = 3 + AVR_REG_R3 = 4 + AVR_REG_R4 = 5 + AVR_REG_R5 = 6 + AVR_REG_R6 = 7 + AVR_REG_R7 = 8 + AVR_REG_R8 = 9 + AVR_REG_R9 = 10 + AVR_REG_R10 = 11 + AVR_REG_R11 = 12 + AVR_REG_R12 = 13 + AVR_REG_R13 = 14 + AVR_REG_R14 = 15 + AVR_REG_R15 = 16 + AVR_REG_R16 = 17 + AVR_REG_R17 = 18 + AVR_REG_R18 = 19 + AVR_REG_R19 = 20 + AVR_REG_R20 = 21 + AVR_REG_R21 = 22 + AVR_REG_R22 = 23 + AVR_REG_R23 = 24 + AVR_REG_R24 = 25 + AVR_REG_R25 = 26 + AVR_REG_R26 = 27 + AVR_REG_R27 = 28 + AVR_REG_R28 = 29 + AVR_REG_R29 = 30 + AVR_REG_R30 = 31 + AVR_REG_R31 = 32 + AVR_REG_PC = 33 + AVR_REG_SP = 34 + AVR_REG_RAMPD = 57 + AVR_REG_RAMPX = 58 + AVR_REG_RAMPY = 59 + AVR_REG_RAMPZ = 60 + AVR_REG_EIND = 61 + AVR_REG_SPL = 62 + AVR_REG_SPH = 63 + AVR_REG_SREG = 64 + +// 16-bit coalesced registers + AVR_REG_R0W = 65 + AVR_REG_R1W = 66 + AVR_REG_R2W = 67 + AVR_REG_R3W = 68 + AVR_REG_R4W = 69 + AVR_REG_R5W = 70 + AVR_REG_R6W = 71 + AVR_REG_R7W = 72 + AVR_REG_R8W = 73 + AVR_REG_R9W = 74 + AVR_REG_R10W = 75 + AVR_REG_R11W = 76 + AVR_REG_R12W = 77 + AVR_REG_R13W = 78 + AVR_REG_R14W = 79 + AVR_REG_R15W = 80 + AVR_REG_R16W = 81 + AVR_REG_R17W = 82 + AVR_REG_R18W = 83 + AVR_REG_R19W = 84 + AVR_REG_R20W = 85 + AVR_REG_R21W = 86 + AVR_REG_R22W = 87 + AVR_REG_R23W = 88 + AVR_REG_R24W = 89 + AVR_REG_R25W = 90 + AVR_REG_R26W = 91 + AVR_REG_R27W = 92 + AVR_REG_R28W = 93 + AVR_REG_R29W = 94 + AVR_REG_R30W = 95 + +// 32-bit coalesced registers + AVR_REG_R0D = 97 + AVR_REG_R1D = 98 + AVR_REG_R2D = 99 + AVR_REG_R3D = 100 + AVR_REG_R4D = 101 + AVR_REG_R5D = 102 + AVR_REG_R6D = 103 + AVR_REG_R7D = 104 + AVR_REG_R8D = 105 + AVR_REG_R9D = 106 + AVR_REG_R10D = 107 + AVR_REG_R11D = 108 + AVR_REG_R12D = 109 + AVR_REG_R13D = 110 + AVR_REG_R14D = 111 + AVR_REG_R15D = 112 + AVR_REG_R16D = 113 + AVR_REG_R17D = 114 + AVR_REG_R18D = 115 + AVR_REG_R19D = 116 + AVR_REG_R20D = 117 + AVR_REG_R21D = 118 + AVR_REG_R22D = 119 + AVR_REG_R23D = 120 + AVR_REG_R24D = 121 + AVR_REG_R25D = 122 + AVR_REG_R26D = 123 + AVR_REG_R27D = 124 + AVR_REG_R28D = 125 + +// Alias registers + AVR_REG_Xhi = 28 + AVR_REG_Xlo = 27 + AVR_REG_Yhi = 30 + AVR_REG_Ylo = 29 + AVR_REG_Zhi = 32 + AVR_REG_Zlo = 31 + AVR_REG_X = 91 + AVR_REG_Y = 93 + AVR_REG_Z = 95 +) \ No newline at end of file diff --git a/bindings/go/unicorn/unicorn_const.go b/bindings/go/unicorn/unicorn_const.go index 16b03619ae..796f8d2b06 100644 --- a/bindings/go/unicorn/unicorn_const.go +++ b/bindings/go/unicorn/unicorn_const.go @@ -23,7 +23,8 @@ const ( ARCH_RISCV = 8 ARCH_S390X = 9 ARCH_TRICORE = 10 - ARCH_MAX = 11 + ARCH_AVR = 11 + ARCH_MAX = 12 MODE_LITTLE_ENDIAN = 0 MODE_BIG_ENDIAN = 1073741824 diff --git a/bindings/java/src/main/java/unicorn/AVRConst.java b/bindings/java/src/main/java/unicorn/AVRConst.java new file mode 100644 index 0000000000..066fd97774 --- /dev/null +++ b/bindings/java/src/main/java/unicorn/AVRConst.java @@ -0,0 +1,153 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +package unicorn; + +public interface AVRConst { + + // AVR architectures + public static final int UC_AVR_ARCH_AVR1 = 10; + public static final int UC_AVR_ARCH_AVR2 = 20; + public static final int UC_AVR_ARCH_AVR25 = 25; + public static final int UC_AVR_ARCH_AVR3 = 30; + public static final int UC_AVR_ARCH_AVR4 = 40; + public static final int UC_AVR_ARCH_AVR5 = 50; + public static final int UC_AVR_ARCH_AVR51 = 51; + public static final int UC_AVR_ARCH_AVR6 = 60; + public static final int UC_CPU_AVR_ARCH = 1000; + + // AVR CPU + public static final int UC_CPU_AVR_ATMEGA16 = 50016; + public static final int UC_CPU_AVR_ATMEGA32 = 50032; + public static final int UC_CPU_AVR_ATMEGA64 = 50064; + public static final int UC_CPU_AVR_ATMEGA128 = 51128; + public static final int UC_CPU_AVR_ATMEGA128RFR2 = 51129; + public static final int UC_CPU_AVR_ATMEGA1280 = 51130; + public static final int UC_CPU_AVR_ATMEGA256 = 60256; + public static final int UC_CPU_AVR_ATMEGA256RFR2 = 60257; + public static final int UC_CPU_AVR_ATMEGA2560 = 60258; + + // AVR memory + public static final int UC_AVR_MEM_FLASH = 134217728; + + // AVR registers + + public static final int UC_AVR_REG_INVALID = 0; + public static final int UC_AVR_REG_R0 = 1; + public static final int UC_AVR_REG_R1 = 2; + public static final int UC_AVR_REG_R2 = 3; + public static final int UC_AVR_REG_R3 = 4; + public static final int UC_AVR_REG_R4 = 5; + public static final int UC_AVR_REG_R5 = 6; + public static final int UC_AVR_REG_R6 = 7; + public static final int UC_AVR_REG_R7 = 8; + public static final int UC_AVR_REG_R8 = 9; + public static final int UC_AVR_REG_R9 = 10; + public static final int UC_AVR_REG_R10 = 11; + public static final int UC_AVR_REG_R11 = 12; + public static final int UC_AVR_REG_R12 = 13; + public static final int UC_AVR_REG_R13 = 14; + public static final int UC_AVR_REG_R14 = 15; + public static final int UC_AVR_REG_R15 = 16; + public static final int UC_AVR_REG_R16 = 17; + public static final int UC_AVR_REG_R17 = 18; + public static final int UC_AVR_REG_R18 = 19; + public static final int UC_AVR_REG_R19 = 20; + public static final int UC_AVR_REG_R20 = 21; + public static final int UC_AVR_REG_R21 = 22; + public static final int UC_AVR_REG_R22 = 23; + public static final int UC_AVR_REG_R23 = 24; + public static final int UC_AVR_REG_R24 = 25; + public static final int UC_AVR_REG_R25 = 26; + public static final int UC_AVR_REG_R26 = 27; + public static final int UC_AVR_REG_R27 = 28; + public static final int UC_AVR_REG_R28 = 29; + public static final int UC_AVR_REG_R29 = 30; + public static final int UC_AVR_REG_R30 = 31; + public static final int UC_AVR_REG_R31 = 32; + public static final int UC_AVR_REG_PC = 33; + public static final int UC_AVR_REG_SP = 34; + public static final int UC_AVR_REG_RAMPD = 57; + public static final int UC_AVR_REG_RAMPX = 58; + public static final int UC_AVR_REG_RAMPY = 59; + public static final int UC_AVR_REG_RAMPZ = 60; + public static final int UC_AVR_REG_EIND = 61; + public static final int UC_AVR_REG_SPL = 62; + public static final int UC_AVR_REG_SPH = 63; + public static final int UC_AVR_REG_SREG = 64; + + // 16-bit coalesced registers + public static final int UC_AVR_REG_R0W = 65; + public static final int UC_AVR_REG_R1W = 66; + public static final int UC_AVR_REG_R2W = 67; + public static final int UC_AVR_REG_R3W = 68; + public static final int UC_AVR_REG_R4W = 69; + public static final int UC_AVR_REG_R5W = 70; + public static final int UC_AVR_REG_R6W = 71; + public static final int UC_AVR_REG_R7W = 72; + public static final int UC_AVR_REG_R8W = 73; + public static final int UC_AVR_REG_R9W = 74; + public static final int UC_AVR_REG_R10W = 75; + public static final int UC_AVR_REG_R11W = 76; + public static final int UC_AVR_REG_R12W = 77; + public static final int UC_AVR_REG_R13W = 78; + public static final int UC_AVR_REG_R14W = 79; + public static final int UC_AVR_REG_R15W = 80; + public static final int UC_AVR_REG_R16W = 81; + public static final int UC_AVR_REG_R17W = 82; + public static final int UC_AVR_REG_R18W = 83; + public static final int UC_AVR_REG_R19W = 84; + public static final int UC_AVR_REG_R20W = 85; + public static final int UC_AVR_REG_R21W = 86; + public static final int UC_AVR_REG_R22W = 87; + public static final int UC_AVR_REG_R23W = 88; + public static final int UC_AVR_REG_R24W = 89; + public static final int UC_AVR_REG_R25W = 90; + public static final int UC_AVR_REG_R26W = 91; + public static final int UC_AVR_REG_R27W = 92; + public static final int UC_AVR_REG_R28W = 93; + public static final int UC_AVR_REG_R29W = 94; + public static final int UC_AVR_REG_R30W = 95; + + // 32-bit coalesced registers + public static final int UC_AVR_REG_R0D = 97; + public static final int UC_AVR_REG_R1D = 98; + public static final int UC_AVR_REG_R2D = 99; + public static final int UC_AVR_REG_R3D = 100; + public static final int UC_AVR_REG_R4D = 101; + public static final int UC_AVR_REG_R5D = 102; + public static final int UC_AVR_REG_R6D = 103; + public static final int UC_AVR_REG_R7D = 104; + public static final int UC_AVR_REG_R8D = 105; + public static final int UC_AVR_REG_R9D = 106; + public static final int UC_AVR_REG_R10D = 107; + public static final int UC_AVR_REG_R11D = 108; + public static final int UC_AVR_REG_R12D = 109; + public static final int UC_AVR_REG_R13D = 110; + public static final int UC_AVR_REG_R14D = 111; + public static final int UC_AVR_REG_R15D = 112; + public static final int UC_AVR_REG_R16D = 113; + public static final int UC_AVR_REG_R17D = 114; + public static final int UC_AVR_REG_R18D = 115; + public static final int UC_AVR_REG_R19D = 116; + public static final int UC_AVR_REG_R20D = 117; + public static final int UC_AVR_REG_R21D = 118; + public static final int UC_AVR_REG_R22D = 119; + public static final int UC_AVR_REG_R23D = 120; + public static final int UC_AVR_REG_R24D = 121; + public static final int UC_AVR_REG_R25D = 122; + public static final int UC_AVR_REG_R26D = 123; + public static final int UC_AVR_REG_R27D = 124; + public static final int UC_AVR_REG_R28D = 125; + + // Alias registers + public static final int UC_AVR_REG_Xhi = 28; + public static final int UC_AVR_REG_Xlo = 27; + public static final int UC_AVR_REG_Yhi = 30; + public static final int UC_AVR_REG_Ylo = 29; + public static final int UC_AVR_REG_Zhi = 32; + public static final int UC_AVR_REG_Zlo = 31; + public static final int UC_AVR_REG_X = 91; + public static final int UC_AVR_REG_Y = 93; + public static final int UC_AVR_REG_Z = 95; + +} diff --git a/bindings/java/src/main/java/unicorn/UnicornConst.java b/bindings/java/src/main/java/unicorn/UnicornConst.java index b0d135a845..6e138e0313 100644 --- a/bindings/java/src/main/java/unicorn/UnicornConst.java +++ b/bindings/java/src/main/java/unicorn/UnicornConst.java @@ -25,7 +25,8 @@ public interface UnicornConst { public static final int UC_ARCH_RISCV = 8; public static final int UC_ARCH_S390X = 9; public static final int UC_ARCH_TRICORE = 10; - public static final int UC_ARCH_MAX = 11; + public static final int UC_ARCH_AVR = 11; + public static final int UC_ARCH_MAX = 12; public static final int UC_MODE_LITTLE_ENDIAN = 0; public static final int UC_MODE_BIG_ENDIAN = 1073741824; diff --git a/bindings/pascal/unicorn/AVRConst.pas b/bindings/pascal/unicorn/AVRConst.pas new file mode 100644 index 0000000000..c607d54ac9 --- /dev/null +++ b/bindings/pascal/unicorn/AVRConst.pas @@ -0,0 +1,155 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit AVRConst; + +interface + +const +// AVR architectures + UC_AVR_ARCH_AVR1 = 10; + UC_AVR_ARCH_AVR2 = 20; + UC_AVR_ARCH_AVR25 = 25; + UC_AVR_ARCH_AVR3 = 30; + UC_AVR_ARCH_AVR4 = 40; + UC_AVR_ARCH_AVR5 = 50; + UC_AVR_ARCH_AVR51 = 51; + UC_AVR_ARCH_AVR6 = 60; + UC_CPU_AVR_ARCH = 1000; + +// AVR CPU + UC_CPU_AVR_ATMEGA16 = 50016; + UC_CPU_AVR_ATMEGA32 = 50032; + UC_CPU_AVR_ATMEGA64 = 50064; + UC_CPU_AVR_ATMEGA128 = 51128; + UC_CPU_AVR_ATMEGA128RFR2 = 51129; + UC_CPU_AVR_ATMEGA1280 = 51130; + UC_CPU_AVR_ATMEGA256 = 60256; + UC_CPU_AVR_ATMEGA256RFR2 = 60257; + UC_CPU_AVR_ATMEGA2560 = 60258; + +// AVR memory + UC_AVR_MEM_FLASH = 134217728; + +// AVR registers + + UC_AVR_REG_INVALID = 0; + UC_AVR_REG_R0 = 1; + UC_AVR_REG_R1 = 2; + UC_AVR_REG_R2 = 3; + UC_AVR_REG_R3 = 4; + UC_AVR_REG_R4 = 5; + UC_AVR_REG_R5 = 6; + UC_AVR_REG_R6 = 7; + UC_AVR_REG_R7 = 8; + UC_AVR_REG_R8 = 9; + UC_AVR_REG_R9 = 10; + UC_AVR_REG_R10 = 11; + UC_AVR_REG_R11 = 12; + UC_AVR_REG_R12 = 13; + UC_AVR_REG_R13 = 14; + UC_AVR_REG_R14 = 15; + UC_AVR_REG_R15 = 16; + UC_AVR_REG_R16 = 17; + UC_AVR_REG_R17 = 18; + UC_AVR_REG_R18 = 19; + UC_AVR_REG_R19 = 20; + UC_AVR_REG_R20 = 21; + UC_AVR_REG_R21 = 22; + UC_AVR_REG_R22 = 23; + UC_AVR_REG_R23 = 24; + UC_AVR_REG_R24 = 25; + UC_AVR_REG_R25 = 26; + UC_AVR_REG_R26 = 27; + UC_AVR_REG_R27 = 28; + UC_AVR_REG_R28 = 29; + UC_AVR_REG_R29 = 30; + UC_AVR_REG_R30 = 31; + UC_AVR_REG_R31 = 32; + UC_AVR_REG_PC = 33; + UC_AVR_REG_SP = 34; + UC_AVR_REG_RAMPD = 57; + UC_AVR_REG_RAMPX = 58; + UC_AVR_REG_RAMPY = 59; + UC_AVR_REG_RAMPZ = 60; + UC_AVR_REG_EIND = 61; + UC_AVR_REG_SPL = 62; + UC_AVR_REG_SPH = 63; + UC_AVR_REG_SREG = 64; + +// 16-bit coalesced registers + UC_AVR_REG_R0W = 65; + UC_AVR_REG_R1W = 66; + UC_AVR_REG_R2W = 67; + UC_AVR_REG_R3W = 68; + UC_AVR_REG_R4W = 69; + UC_AVR_REG_R5W = 70; + UC_AVR_REG_R6W = 71; + UC_AVR_REG_R7W = 72; + UC_AVR_REG_R8W = 73; + UC_AVR_REG_R9W = 74; + UC_AVR_REG_R10W = 75; + UC_AVR_REG_R11W = 76; + UC_AVR_REG_R12W = 77; + UC_AVR_REG_R13W = 78; + UC_AVR_REG_R14W = 79; + UC_AVR_REG_R15W = 80; + UC_AVR_REG_R16W = 81; + UC_AVR_REG_R17W = 82; + UC_AVR_REG_R18W = 83; + UC_AVR_REG_R19W = 84; + UC_AVR_REG_R20W = 85; + UC_AVR_REG_R21W = 86; + UC_AVR_REG_R22W = 87; + UC_AVR_REG_R23W = 88; + UC_AVR_REG_R24W = 89; + UC_AVR_REG_R25W = 90; + UC_AVR_REG_R26W = 91; + UC_AVR_REG_R27W = 92; + UC_AVR_REG_R28W = 93; + UC_AVR_REG_R29W = 94; + UC_AVR_REG_R30W = 95; + +// 32-bit coalesced registers + UC_AVR_REG_R0D = 97; + UC_AVR_REG_R1D = 98; + UC_AVR_REG_R2D = 99; + UC_AVR_REG_R3D = 100; + UC_AVR_REG_R4D = 101; + UC_AVR_REG_R5D = 102; + UC_AVR_REG_R6D = 103; + UC_AVR_REG_R7D = 104; + UC_AVR_REG_R8D = 105; + UC_AVR_REG_R9D = 106; + UC_AVR_REG_R10D = 107; + UC_AVR_REG_R11D = 108; + UC_AVR_REG_R12D = 109; + UC_AVR_REG_R13D = 110; + UC_AVR_REG_R14D = 111; + UC_AVR_REG_R15D = 112; + UC_AVR_REG_R16D = 113; + UC_AVR_REG_R17D = 114; + UC_AVR_REG_R18D = 115; + UC_AVR_REG_R19D = 116; + UC_AVR_REG_R20D = 117; + UC_AVR_REG_R21D = 118; + UC_AVR_REG_R22D = 119; + UC_AVR_REG_R23D = 120; + UC_AVR_REG_R24D = 121; + UC_AVR_REG_R25D = 122; + UC_AVR_REG_R26D = 123; + UC_AVR_REG_R27D = 124; + UC_AVR_REG_R28D = 125; + +// Alias registers + UC_AVR_REG_Xhi = 28; + UC_AVR_REG_Xlo = 27; + UC_AVR_REG_Yhi = 30; + UC_AVR_REG_Ylo = 29; + UC_AVR_REG_Zhi = 32; + UC_AVR_REG_Zlo = 31; + UC_AVR_REG_X = 91; + UC_AVR_REG_Y = 93; + UC_AVR_REG_Z = 95; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/UnicornConst.pas b/bindings/pascal/unicorn/UnicornConst.pas index 92a99d4a56..63a447f2e9 100644 --- a/bindings/pascal/unicorn/UnicornConst.pas +++ b/bindings/pascal/unicorn/UnicornConst.pas @@ -26,7 +26,8 @@ interface UC_ARCH_RISCV = 8; UC_ARCH_S390X = 9; UC_ARCH_TRICORE = 10; - UC_ARCH_MAX = 11; + UC_ARCH_AVR = 11; + UC_ARCH_MAX = 12; UC_MODE_LITTLE_ENDIAN = 0; UC_MODE_BIG_ENDIAN = 1073741824; diff --git a/bindings/python/unicorn/avr_const.py b/bindings/python/unicorn/avr_const.py new file mode 100644 index 0000000000..1bf80a3fa5 --- /dev/null +++ b/bindings/python/unicorn/avr_const.py @@ -0,0 +1,147 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [avr_const.py] + +# AVR architectures +UC_AVR_ARCH_AVR1 = 10 +UC_AVR_ARCH_AVR2 = 20 +UC_AVR_ARCH_AVR25 = 25 +UC_AVR_ARCH_AVR3 = 30 +UC_AVR_ARCH_AVR4 = 40 +UC_AVR_ARCH_AVR5 = 50 +UC_AVR_ARCH_AVR51 = 51 +UC_AVR_ARCH_AVR6 = 60 +UC_CPU_AVR_ARCH = 1000 + +# AVR CPU +UC_CPU_AVR_ATMEGA16 = 50016 +UC_CPU_AVR_ATMEGA32 = 50032 +UC_CPU_AVR_ATMEGA64 = 50064 +UC_CPU_AVR_ATMEGA128 = 51128 +UC_CPU_AVR_ATMEGA128RFR2 = 51129 +UC_CPU_AVR_ATMEGA1280 = 51130 +UC_CPU_AVR_ATMEGA256 = 60256 +UC_CPU_AVR_ATMEGA256RFR2 = 60257 +UC_CPU_AVR_ATMEGA2560 = 60258 + +# AVR memory +UC_AVR_MEM_FLASH = 134217728 + +# AVR registers + +UC_AVR_REG_INVALID = 0 +UC_AVR_REG_R0 = 1 +UC_AVR_REG_R1 = 2 +UC_AVR_REG_R2 = 3 +UC_AVR_REG_R3 = 4 +UC_AVR_REG_R4 = 5 +UC_AVR_REG_R5 = 6 +UC_AVR_REG_R6 = 7 +UC_AVR_REG_R7 = 8 +UC_AVR_REG_R8 = 9 +UC_AVR_REG_R9 = 10 +UC_AVR_REG_R10 = 11 +UC_AVR_REG_R11 = 12 +UC_AVR_REG_R12 = 13 +UC_AVR_REG_R13 = 14 +UC_AVR_REG_R14 = 15 +UC_AVR_REG_R15 = 16 +UC_AVR_REG_R16 = 17 +UC_AVR_REG_R17 = 18 +UC_AVR_REG_R18 = 19 +UC_AVR_REG_R19 = 20 +UC_AVR_REG_R20 = 21 +UC_AVR_REG_R21 = 22 +UC_AVR_REG_R22 = 23 +UC_AVR_REG_R23 = 24 +UC_AVR_REG_R24 = 25 +UC_AVR_REG_R25 = 26 +UC_AVR_REG_R26 = 27 +UC_AVR_REG_R27 = 28 +UC_AVR_REG_R28 = 29 +UC_AVR_REG_R29 = 30 +UC_AVR_REG_R30 = 31 +UC_AVR_REG_R31 = 32 +UC_AVR_REG_PC = 33 +UC_AVR_REG_SP = 34 +UC_AVR_REG_RAMPD = 57 +UC_AVR_REG_RAMPX = 58 +UC_AVR_REG_RAMPY = 59 +UC_AVR_REG_RAMPZ = 60 +UC_AVR_REG_EIND = 61 +UC_AVR_REG_SPL = 62 +UC_AVR_REG_SPH = 63 +UC_AVR_REG_SREG = 64 + +# 16-bit coalesced registers +UC_AVR_REG_R0W = 65 +UC_AVR_REG_R1W = 66 +UC_AVR_REG_R2W = 67 +UC_AVR_REG_R3W = 68 +UC_AVR_REG_R4W = 69 +UC_AVR_REG_R5W = 70 +UC_AVR_REG_R6W = 71 +UC_AVR_REG_R7W = 72 +UC_AVR_REG_R8W = 73 +UC_AVR_REG_R9W = 74 +UC_AVR_REG_R10W = 75 +UC_AVR_REG_R11W = 76 +UC_AVR_REG_R12W = 77 +UC_AVR_REG_R13W = 78 +UC_AVR_REG_R14W = 79 +UC_AVR_REG_R15W = 80 +UC_AVR_REG_R16W = 81 +UC_AVR_REG_R17W = 82 +UC_AVR_REG_R18W = 83 +UC_AVR_REG_R19W = 84 +UC_AVR_REG_R20W = 85 +UC_AVR_REG_R21W = 86 +UC_AVR_REG_R22W = 87 +UC_AVR_REG_R23W = 88 +UC_AVR_REG_R24W = 89 +UC_AVR_REG_R25W = 90 +UC_AVR_REG_R26W = 91 +UC_AVR_REG_R27W = 92 +UC_AVR_REG_R28W = 93 +UC_AVR_REG_R29W = 94 +UC_AVR_REG_R30W = 95 + +# 32-bit coalesced registers +UC_AVR_REG_R0D = 97 +UC_AVR_REG_R1D = 98 +UC_AVR_REG_R2D = 99 +UC_AVR_REG_R3D = 100 +UC_AVR_REG_R4D = 101 +UC_AVR_REG_R5D = 102 +UC_AVR_REG_R6D = 103 +UC_AVR_REG_R7D = 104 +UC_AVR_REG_R8D = 105 +UC_AVR_REG_R9D = 106 +UC_AVR_REG_R10D = 107 +UC_AVR_REG_R11D = 108 +UC_AVR_REG_R12D = 109 +UC_AVR_REG_R13D = 110 +UC_AVR_REG_R14D = 111 +UC_AVR_REG_R15D = 112 +UC_AVR_REG_R16D = 113 +UC_AVR_REG_R17D = 114 +UC_AVR_REG_R18D = 115 +UC_AVR_REG_R19D = 116 +UC_AVR_REG_R20D = 117 +UC_AVR_REG_R21D = 118 +UC_AVR_REG_R22D = 119 +UC_AVR_REG_R23D = 120 +UC_AVR_REG_R24D = 121 +UC_AVR_REG_R25D = 122 +UC_AVR_REG_R26D = 123 +UC_AVR_REG_R27D = 124 +UC_AVR_REG_R28D = 125 + +# Alias registers +UC_AVR_REG_Xhi = 28 +UC_AVR_REG_Xlo = 27 +UC_AVR_REG_Yhi = 30 +UC_AVR_REG_Ylo = 29 +UC_AVR_REG_Zhi = 32 +UC_AVR_REG_Zlo = 31 +UC_AVR_REG_X = 91 +UC_AVR_REG_Y = 93 +UC_AVR_REG_Z = 95 diff --git a/bindings/python/unicorn/unicorn_const.py b/bindings/python/unicorn/unicorn_const.py index 46c53ddc14..249f8fed6b 100644 --- a/bindings/python/unicorn/unicorn_const.py +++ b/bindings/python/unicorn/unicorn_const.py @@ -21,7 +21,8 @@ UC_ARCH_RISCV = 8 UC_ARCH_S390X = 9 UC_ARCH_TRICORE = 10 -UC_ARCH_MAX = 11 +UC_ARCH_AVR = 11 +UC_ARCH_MAX = 12 UC_MODE_LITTLE_ENDIAN = 0 UC_MODE_BIG_ENDIAN = 1073741824 diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/avr_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/avr_const.rb new file mode 100644 index 0000000000..126ebd0c8f --- /dev/null +++ b/bindings/ruby/unicorn_gem/lib/unicorn_engine/avr_const.rb @@ -0,0 +1,150 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [avr_const.rb] + +module UnicornEngine + +# AVR architectures + UC_AVR_ARCH_AVR1 = 10 + UC_AVR_ARCH_AVR2 = 20 + UC_AVR_ARCH_AVR25 = 25 + UC_AVR_ARCH_AVR3 = 30 + UC_AVR_ARCH_AVR4 = 40 + UC_AVR_ARCH_AVR5 = 50 + UC_AVR_ARCH_AVR51 = 51 + UC_AVR_ARCH_AVR6 = 60 + UC_CPU_AVR_ARCH = 1000 + +# AVR CPU + UC_CPU_AVR_ATMEGA16 = 50016 + UC_CPU_AVR_ATMEGA32 = 50032 + UC_CPU_AVR_ATMEGA64 = 50064 + UC_CPU_AVR_ATMEGA128 = 51128 + UC_CPU_AVR_ATMEGA128RFR2 = 51129 + UC_CPU_AVR_ATMEGA1280 = 51130 + UC_CPU_AVR_ATMEGA256 = 60256 + UC_CPU_AVR_ATMEGA256RFR2 = 60257 + UC_CPU_AVR_ATMEGA2560 = 60258 + +# AVR memory + UC_AVR_MEM_FLASH = 134217728 + +# AVR registers + + UC_AVR_REG_INVALID = 0 + UC_AVR_REG_R0 = 1 + UC_AVR_REG_R1 = 2 + UC_AVR_REG_R2 = 3 + UC_AVR_REG_R3 = 4 + UC_AVR_REG_R4 = 5 + UC_AVR_REG_R5 = 6 + UC_AVR_REG_R6 = 7 + UC_AVR_REG_R7 = 8 + UC_AVR_REG_R8 = 9 + UC_AVR_REG_R9 = 10 + UC_AVR_REG_R10 = 11 + UC_AVR_REG_R11 = 12 + UC_AVR_REG_R12 = 13 + UC_AVR_REG_R13 = 14 + UC_AVR_REG_R14 = 15 + UC_AVR_REG_R15 = 16 + UC_AVR_REG_R16 = 17 + UC_AVR_REG_R17 = 18 + UC_AVR_REG_R18 = 19 + UC_AVR_REG_R19 = 20 + UC_AVR_REG_R20 = 21 + UC_AVR_REG_R21 = 22 + UC_AVR_REG_R22 = 23 + UC_AVR_REG_R23 = 24 + UC_AVR_REG_R24 = 25 + UC_AVR_REG_R25 = 26 + UC_AVR_REG_R26 = 27 + UC_AVR_REG_R27 = 28 + UC_AVR_REG_R28 = 29 + UC_AVR_REG_R29 = 30 + UC_AVR_REG_R30 = 31 + UC_AVR_REG_R31 = 32 + UC_AVR_REG_PC = 33 + UC_AVR_REG_SP = 34 + UC_AVR_REG_RAMPD = 57 + UC_AVR_REG_RAMPX = 58 + UC_AVR_REG_RAMPY = 59 + UC_AVR_REG_RAMPZ = 60 + UC_AVR_REG_EIND = 61 + UC_AVR_REG_SPL = 62 + UC_AVR_REG_SPH = 63 + UC_AVR_REG_SREG = 64 + +# 16-bit coalesced registers + UC_AVR_REG_R0W = 65 + UC_AVR_REG_R1W = 66 + UC_AVR_REG_R2W = 67 + UC_AVR_REG_R3W = 68 + UC_AVR_REG_R4W = 69 + UC_AVR_REG_R5W = 70 + UC_AVR_REG_R6W = 71 + UC_AVR_REG_R7W = 72 + UC_AVR_REG_R8W = 73 + UC_AVR_REG_R9W = 74 + UC_AVR_REG_R10W = 75 + UC_AVR_REG_R11W = 76 + UC_AVR_REG_R12W = 77 + UC_AVR_REG_R13W = 78 + UC_AVR_REG_R14W = 79 + UC_AVR_REG_R15W = 80 + UC_AVR_REG_R16W = 81 + UC_AVR_REG_R17W = 82 + UC_AVR_REG_R18W = 83 + UC_AVR_REG_R19W = 84 + UC_AVR_REG_R20W = 85 + UC_AVR_REG_R21W = 86 + UC_AVR_REG_R22W = 87 + UC_AVR_REG_R23W = 88 + UC_AVR_REG_R24W = 89 + UC_AVR_REG_R25W = 90 + UC_AVR_REG_R26W = 91 + UC_AVR_REG_R27W = 92 + UC_AVR_REG_R28W = 93 + UC_AVR_REG_R29W = 94 + UC_AVR_REG_R30W = 95 + +# 32-bit coalesced registers + UC_AVR_REG_R0D = 97 + UC_AVR_REG_R1D = 98 + UC_AVR_REG_R2D = 99 + UC_AVR_REG_R3D = 100 + UC_AVR_REG_R4D = 101 + UC_AVR_REG_R5D = 102 + UC_AVR_REG_R6D = 103 + UC_AVR_REG_R7D = 104 + UC_AVR_REG_R8D = 105 + UC_AVR_REG_R9D = 106 + UC_AVR_REG_R10D = 107 + UC_AVR_REG_R11D = 108 + UC_AVR_REG_R12D = 109 + UC_AVR_REG_R13D = 110 + UC_AVR_REG_R14D = 111 + UC_AVR_REG_R15D = 112 + UC_AVR_REG_R16D = 113 + UC_AVR_REG_R17D = 114 + UC_AVR_REG_R18D = 115 + UC_AVR_REG_R19D = 116 + UC_AVR_REG_R20D = 117 + UC_AVR_REG_R21D = 118 + UC_AVR_REG_R22D = 119 + UC_AVR_REG_R23D = 120 + UC_AVR_REG_R24D = 121 + UC_AVR_REG_R25D = 122 + UC_AVR_REG_R26D = 123 + UC_AVR_REG_R27D = 124 + UC_AVR_REG_R28D = 125 + +# Alias registers + UC_AVR_REG_Xhi = 28 + UC_AVR_REG_Xlo = 27 + UC_AVR_REG_Yhi = 30 + UC_AVR_REG_Ylo = 29 + UC_AVR_REG_Zhi = 32 + UC_AVR_REG_Zlo = 31 + UC_AVR_REG_X = 91 + UC_AVR_REG_Y = 93 + UC_AVR_REG_Z = 95 +end \ No newline at end of file diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/unicorn_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/unicorn_const.rb index 8c004ed0e8..f8c5132f7e 100644 --- a/bindings/ruby/unicorn_gem/lib/unicorn_engine/unicorn_const.rb +++ b/bindings/ruby/unicorn_gem/lib/unicorn_engine/unicorn_const.rb @@ -23,7 +23,8 @@ module UnicornEngine UC_ARCH_RISCV = 8 UC_ARCH_S390X = 9 UC_ARCH_TRICORE = 10 - UC_ARCH_MAX = 11 + UC_ARCH_AVR = 11 + UC_ARCH_MAX = 12 UC_MODE_LITTLE_ENDIAN = 0 UC_MODE_BIG_ENDIAN = 1073741824 diff --git a/bindings/zig/unicorn/unicorn_const.zig b/bindings/zig/unicorn/unicorn_const.zig index aaf1169f58..e0511746ea 100644 --- a/bindings/zig/unicorn/unicorn_const.zig +++ b/bindings/zig/unicorn/unicorn_const.zig @@ -23,7 +23,8 @@ pub const unicornConst = enum(c_int) { ARCH_RISCV = 8, ARCH_S390X = 9, ARCH_TRICORE = 10, - ARCH_MAX = 11, + ARCH_AVR = 11, + ARCH_MAX = 12, MODE_LITTLE_ENDIAN = 0, MODE_BIG_ENDIAN = 1073741824,