c53489973f5375a7bb8f1409bd642bdeded2dcc6 | Baseline as far as lcd_ctrl.sv |
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Flow Status | Successful - Thu Dec 8 11:11:13 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,173 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
780c427c1d3722fc1f8301393196687e4d79d7c6 | |
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Flow Status | Successful - Thu Dec 8 11:16:19 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,097 / 49,760 ( 4 % ) |
Total registers | 562 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
Branch state_machine_quartus_detected
081655c935857b9e18e53db0efe2454b8787b982 | Fix HOLD to 32'h1 |
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Flow Status | Successful - Thu Dec 8 12:17:20 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,173 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
7564c29533b120e737ccb3c766b16b8d024efe83 | compressed states into a continuous bit range |
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Flow Status | Successful - Thu Dec 8 12:23:15 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,173 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
3a7e25c9177b3de39efec08ef40a2411d5f6fd53 | compress state vars from int to width of actual state usage |
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Flow Status | Successful - Thu Dec 8 12:30:47 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,173 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
b32abdccd52e21d6241c5da73913401c545934a2 | change state machine to support optional binary encoding instead of one-hot |
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Flow Status | Successful - Thu Dec 8 17:58:03 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,173 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
4f43547bdb15bc82d1408da055cc627e16df1f2e | enable optional binary encoding |
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Flow Status | Successful - Thu Dec 8 18:02:01 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,173 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
7e2b6d9fa4ac254e48b8644a11f3245c5e1a5f24 | reset default value of next_state to '0, should not matter, but it does! |
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Flow Status | Successful - Thu Dec 8 12:44:23 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,204 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
59524f014d4b1971f778284f3afec1e04579cf94 | Tried reverting default value of next_state to HOLD |
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Flow Status | Successful - Thu Dec 8 17:10:35 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,204 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
cb17fee7eb4203cfb0d062c280c11addb44753af | enums are now autonumbered and actual state value computed in the machine |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,204 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
p44bc03fd77df1bd81f1e9a5a5b2a4b7e86360cc5 | update next_state by writing only the next state bit, relying on default 0 value set at the beginning of the block |
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Flow Status | Successful - Thu Dec 8 15:36:45 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,204 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
80d53bd657fa4aecb40eff22abf4faeafbc1ba37 | finalized conversion to one hot encoding with reverse case statement |
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Flow Status | Successful - Thu Dec 8 15:50:31 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,195 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
6a0772050ee80d4c3331a1de9cb46908f5285202 | tried to move default state into each case item |
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Flow Status | Successful - Thu Dec 8 17:00:42 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,195 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
5ecddd1d4ecdb4ba017ea5005ac99e8a53ab96d3 | try unique case()... |
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Flow Status | Successful - Thu Dec 8 16:03:44 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,204 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
2fd22ecde91dd7ebb2e1afcc1c408a6fb6e27f35 | try unique0 case()... |
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Compilation fails! unique0 keyword is not recognized by Quartus 21.1.1 Build 850 | |
90c629c3d2751adf8a48055964cf4f5c264145a8 | unique case with default statement driving next_state = 'x |
Design fails on HW! | |
Flow Status | Successful - Thu Dec 8 16:20:12 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,212 / 49,760 ( 4 % ) |
Total registers | 614 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
4702079a9a8da4378ba9619322b53c34618efadc | unique case, default to 'x, and 0 case to HOLD state |
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Design fails on HW! | |
Flow Status | Successful - Thu Dec 8 16:22:53 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,212 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
0fc3da057be480dd9bb0cdea9e41e7ac23ba01de | unique case, no default, 0 case to HOLD for reset |
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Design fails on HW! | |
Flow Status | Successful - Thu Dec 8 16:26:12 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,221 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
80155004a20e82011068edcff54a30d2c5655479 | plain case, default to 'x, and 0 case to HOLD state |
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Design fails on HW! | |
Flow Status | Successful - Thu Dec 8 16:30:50 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,212 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |
c24291197fa8de099216b489c79c9d1975e930e4 | plain case, no default, and 0 case to HOLD state |
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Design fails on HW! | |
Flow Status | Successful - Thu Dec 8 16:35:48 2022 |
Quartus Prime Version | 21.1.1 Build 850 06/23/2022 SJ Lite Edition |
Revision Name | lcd-working |
Top-level Entity Name | Top_template |
Family | MAX 10 |
Device | 10M50DAF484C7G |
Timing Models | Final |
Total logic elements | 2,214 / 49,760 ( 4 % ) |
Total registers | 615 |
Total pins | 185 / 360 ( 51 % ) |
Total virtual pins | 0 |
Total memory bits | 17,152 / 1,677,312 ( 1 % ) |
Embedded Multiplier 9-bit elements | 0 / 288 ( 0 % ) |
Total PLLs | 2 / 4 ( 50 % ) |
UFM blocks | 0 / 1 ( 0 % ) |
ADC blocks | 1 / 2 ( 50 % ) |