diff --git a/core/embed/boardloader/main.c b/core/embed/boardloader/main.c
index bca05ffd95..4162c4279d 100644
--- a/core/embed/boardloader/main.c
+++ b/core/embed/boardloader/main.c
@@ -246,16 +246,14 @@ int main(void) {
     delete_secrets();
     NVIC_SystemReset();
   }
+
+  trustzone_init_boardloader();
 #endif
 
 #ifdef STM32F4
   clear_otg_hs_memory();
 #endif
 
-#ifdef STM32U5
-  trustzone_init_boardloader();
-#endif
-
   mpu_config_boardloader();
 
 #ifdef USE_SDRAM
diff --git a/core/embed/trezorhal/stm32u5/trustzone.c b/core/embed/trezorhal/stm32u5/trustzone.c
index 4998ac6e95..1989eb872c 100644
--- a/core/embed/trezorhal/stm32u5/trustzone.c
+++ b/core/embed/trezorhal/stm32u5/trustzone.c
@@ -24,7 +24,7 @@
 #ifdef BOARDLOADER
 
 // Configure ARMCortex-M33 SCB and FPU security
-static void trustzone_configure_arm() {
+static void trustzone_configure_arm(void) {
   // Enable FPU in both secure and non-secure modes
   SCB->NSACR |= SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk;
 
@@ -37,8 +37,8 @@ static void trustzone_configure_arm() {
 }
 
 // Configure SRAM security
-static void trustzone_configure_sram() {
-  MPCBB_ConfigTypeDef mpcbb = {};
+static void trustzone_configure_sram(void) {
+  MPCBB_ConfigTypeDef mpcbb = {0};
 
   // No exceptions on illegal access
   mpcbb.SecureRWIllegalMode = GTZC_MPCBB_SRWILADIS_DISABLE;
@@ -66,8 +66,8 @@ static void trustzone_configure_sram() {
 }
 
 // Configure FLASH security
-static void trustzone_configure_flash() {
-  FLASH_BBAttributesTypeDef flash_bb = {};
+static void trustzone_configure_flash(void) {
+  FLASH_BBAttributesTypeDef flash_bb = {0};
 
   // Set all blocks as secured
   for (int index = 0; index < FLASH_BLOCKBASED_NB_REG; index++) {