Schematic revisions 2022/10/10

[alastairpatrick]

The schematic is much easier to follow. Some minor things.

• J9 is still in the schematic but now redundant.
• FPGA is still connected to ICE_LED_R/G/B nets, which should be LED_R/G/B now.

[alastairpatrick]

The absolute max voltage on any PSRAM pin is Vdd+0.4 and max input high voltage is Vdd+0.2. So D4 should have a forward voltage of less than 0.4V. Forward voltage for 1N5819WS at the current it'll be handling isn't specified but @1a, the forward voltage is 0.6V.

[vr2045]

Looking at the figure below from the datasheet for one of the el-cheapo parts on LCSC, I see that the forward voltage drop is <0.3V for 20mA which is the peak expected current into the part.