Support for C operators on RVV types

[jacquesguan]

Now clang support some C operators (such as: arithmetic, bitwise and subscript) for SVE sizeless types. I think we could support these operator for RVV sizeless too. Actually in some real cases where vl=vlmax and without mask, using operators instead of builtin is more clear and would enable more ir/backend optimizations.
I create a llvm patch here: https://reviews.llvm.org/D158259

[jacquesguan]

I am not sure this issue should discuss here or in https://github.com/riscv-non-isa/rvv-intrinsic-doc since it isn't an instrinsic problem.

[cmuellner]

Thanks for bringing this topic up! We briefly touched this today in the SIG Toolchain call. @eopXD (chair of the vector intrinsics TG) will discuss this within the Vector Intrinsics TG.

[eopXD]

Hi @jacquesguan,

We will be discussing this in the RVV C intrinsics meeting today [0]. If possible, may you attend the meeting and propose what you have in hand?

Thank you.

[0] Meeting reminder 10/03

[jacquesguan]

Hi @jacquesguan,

We will be discussing this in the RVV C intrinsics meeting today [0]. If possible, may you attend the meeting and propose what you have in hand?

Thank you.

[0] Meeting reminder 10/03

Sorry, I was on vocation in that day and just read this comment right now.

[eopXD]

Hi JianJian,

No problem. It was discussed on the meeting that there is not much push back for this syntax sugar that can help porting for libraries that targets other architectures. So I guess we can proceed by proposing your targeting behavior in the intrinsics document.

On the other hand, I am curious about the optimizations you mentioned that would be enabled. Wouldn't it be the same if vlmax is specified in the intrinsic functions?

[jacquesguan]

Hi JianJian,

No problem. It was discussed on the meeting that there is not much push back for this syntax sugar that can help porting for libraries that targets other architectures. So I guess we can proceed by proposing your targeting behavior in the intrinsics document.

On the other hand, I am curious about the optimizations you mentioned that would be enabled. Wouldn't it be the same if vlmax is specified in the intrinsic functions?

If we use intrinsics, I believe that IR combiner and DAG combine wouldn't work.

by example,

vec_c = vec_a + vec_b; vec_d = vec_c - vec_b;

If we write it in intrinsic, vec_d will still be calculated by vadd and vsub not directly the value of vec_a.