-
Notifications
You must be signed in to change notification settings - Fork 3
/
block_0_ral_pkg.sv
347 lines (347 loc) · 17.2 KB
/
block_0_ral_pkg.sv
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
package block_0_ral_pkg;
import uvm_pkg::*;
import rggen_ral_pkg::*;
`include "uvm_macros.svh"
`include "rggen_ral_macros.svh"
class register_0_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
rand rggen_ral_field bit_field_4;
rand rggen_ral_field bit_field_5;
rand rggen_ral_rowo_field bit_field_6;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "RW", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 4, 4, "RW", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_2, 8, 1, "RW", 0, 1'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 9, 2, "W1", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_4, 11, 2, "WRC", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_5, 13, 2, "WRS", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_6, 15, 2, "ROWO", 1, 2'h0, 1, -1, "")
endfunction
endclass
class register_1_reg_model extends rggen_ral_reg;
rand rggen_ral_field register_1;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(register_1, 0, 1, "RW", 0, 1'h0, 1, -1, "")
endfunction
endclass
class register_2_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "RO", 1, 4'h0, 0, -1, "")
`rggen_ral_create_field(bit_field_1, 8, 8, "RO", 0, 8'hab, 1, -1, "")
`rggen_ral_create_field(bit_field_2, 16, 4, "RO", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 20, 4, "RO", 1, 4'h0, 1, -1, "register_3.bit_field_3")
endfunction
endclass
class register_3_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_w0trg_field bit_field_2;
rand rggen_ral_w1trg_field bit_field_3;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "WO", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 4, 4, "WO1", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_2, 8, 4, "W0TRG", 0, 4'h0, 0, -1, "")
`rggen_ral_create_field(bit_field_3, 16, 4, "W1TRG", 0, 4'h0, 0, -1, "")
endfunction
endclass
class register_4_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "RC", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 8, 4, "RC", 1, 4'h0, 1, -1, "register_0.bit_field_0")
`rggen_ral_create_field(bit_field_2, 12, 4, "RO", 1, 4'h0, 0, -1, "register_4.bit_field_1")
`rggen_ral_create_field(bit_field_3, 16, 4, "RS", 1, 4'h0, 1, -1, "")
endfunction
endclass
class register_5_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
rand rggen_ral_field bit_field_4;
rand rggen_ral_field bit_field_5;
rand rggen_ral_rwe_field bit_field_6;
rand rggen_ral_rwe_field bit_field_7;
rand rggen_ral_rwe_field bit_field_8;
rand rggen_ral_rwl_field bit_field_9;
rand rggen_ral_rwl_field bit_field_10;
rand rggen_ral_rwl_field bit_field_11;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 2, "RW", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 2, 2, "RW", 1, 2'h0, 1, -1, "register_3.bit_field_2")
`rggen_ral_create_field(bit_field_2, 4, 2, "RW", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 6, 2, "RW", 1, 2'h0, 1, -1, "register_3.bit_field_2")
`rggen_ral_create_field(bit_field_4, 8, 2, "RW", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_5, 10, 2, "RW", 1, 2'h0, 1, -1, "register_3.bit_field_3")
`rggen_ral_create_field(bit_field_6, 12, 2, "RWE", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_7, 14, 2, "RWE", 0, 2'h0, 1, -1, "register_0.bit_field_2")
`rggen_ral_create_field(bit_field_8, 16, 2, "RWE", 0, 2'h0, 1, -1, "register_1.register_1")
`rggen_ral_create_field(bit_field_9, 20, 2, "RWL", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_10, 22, 2, "RWL", 0, 2'h0, 1, -1, "register_0.bit_field_2")
`rggen_ral_create_field(bit_field_11, 24, 2, "RWL", 0, 2'h0, 1, -1, "register_1.register_1")
endfunction
endclass
class register_6_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
rand rggen_ral_field bit_field_4;
rand rggen_ral_field bit_field_5;
rand rggen_ral_field bit_field_6;
rand rggen_ral_field bit_field_7;
rand rggen_ral_field bit_field_8;
rand rggen_ral_field bit_field_9;
function new(string name);
super.new(name, 64, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "W0C", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 4, 4, "W0C", 1, 4'h0, 1, -1, "register_0.bit_field_0")
`rggen_ral_create_field(bit_field_2, 8, 4, "RO", 1, 4'h0, 0, -1, "register_6.bit_field_1")
`rggen_ral_create_field(bit_field_3, 12, 4, "W1C", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_4, 16, 4, "W1C", 1, 4'h0, 1, -1, "register_0.bit_field_0")
`rggen_ral_create_field(bit_field_5, 20, 4, "RO", 1, 4'h0, 0, -1, "register_6.bit_field_4")
`rggen_ral_create_field(bit_field_6, 24, 4, "W0S", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_7, 28, 4, "W1S", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_8, 32, 4, "W0T", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_9, 36, 4, "W1T", 0, 4'h0, 1, -1, "")
endfunction
endclass
class register_7_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "W0CRS", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 8, 4, "W1CRS", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_2, 16, 4, "W0SRC", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 24, 4, "W1SRC", 0, 4'h0, 1, -1, "")
endfunction
endclass
class register_8_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_field bit_field_3;
rand rggen_ral_field bit_field_4;
rand rggen_ral_field bit_field_5;
function new(string name);
super.new(name, 64, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 4, "WC", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 8, 4, "WS", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_2, 16, 4, "WOC", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 24, 4, "WOS", 1, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_4, 32, 4, "WCRS", 0, 4'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_5, 40, 4, "WSRC", 0, 4'h0, 1, -1, "")
endfunction
endclass
class register_9_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
rand rggen_ral_field bit_field_2;
rand rggen_ral_rowo_field bit_field_3;
rand rggen_ral_row0trg_field bit_field_4;
rand rggen_ral_row1trg_field bit_field_5;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 2, "RW", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 2, 2, "RO", 1, 2'h0, 0, -1, "")
`rggen_ral_create_field(bit_field_2, 4, 2, "WO", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 6, 2, "ROWO", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_4, 8, 2, "ROW0TRG", 1, 2'h0, 0, -1, "")
`rggen_ral_create_field(bit_field_5, 10, 2, "ROW1TRG", 1, 2'h0, 0, -1, "")
endfunction
endclass
class register_10_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0[4];
rand rggen_ral_field bit_field_1[4];
rand rggen_ral_field bit_field_2[4];
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0[0], 0, 2, "RW", 0, 2'h0, 1, 0, "")
`rggen_ral_create_field(bit_field_0[1], 8, 2, "RW", 0, 2'h0, 1, 1, "")
`rggen_ral_create_field(bit_field_0[2], 16, 2, "RW", 0, 2'h0, 1, 2, "")
`rggen_ral_create_field(bit_field_0[3], 24, 2, "RW", 0, 2'h0, 1, 3, "")
`rggen_ral_create_field(bit_field_1[0], 2, 2, "RW", 0, 2'h0, 1, 0, "")
`rggen_ral_create_field(bit_field_1[1], 10, 2, "RW", 0, 2'h0, 1, 1, "")
`rggen_ral_create_field(bit_field_1[2], 18, 2, "RW", 0, 2'h0, 1, 2, "")
`rggen_ral_create_field(bit_field_1[3], 26, 2, "RW", 0, 2'h0, 1, 3, "")
`rggen_ral_create_field(bit_field_2[0], 4, 2, "RW", 0, 2'h0, 1, 0, "")
`rggen_ral_create_field(bit_field_2[1], 12, 2, "RW", 0, 2'h1, 1, 1, "")
`rggen_ral_create_field(bit_field_2[2], 20, 2, "RW", 0, 2'h2, 1, 2, "")
`rggen_ral_create_field(bit_field_2[3], 28, 2, "RW", 0, 2'h3, 1, 3, "")
endfunction
endclass
class register_11_reg_model extends rggen_ral_indirect_reg;
rand rggen_ral_field bit_field_0[4];
rand rggen_ral_field bit_field_1[4];
function new(string name);
super.new(name, 64, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0[0], 0, 8, "RW", 0, 8'h00, 1, 0, "")
`rggen_ral_create_field(bit_field_0[1], 16, 8, "RW", 0, 8'h00, 1, 1, "")
`rggen_ral_create_field(bit_field_0[2], 32, 8, "RW", 0, 8'h00, 1, 2, "")
`rggen_ral_create_field(bit_field_0[3], 48, 8, "RW", 0, 8'h00, 1, 3, "")
`rggen_ral_create_field(bit_field_1[0], 8, 8, "RW", 0, 8'h00, 1, 0, "")
`rggen_ral_create_field(bit_field_1[1], 24, 8, "RW", 0, 8'h00, 1, 1, "")
`rggen_ral_create_field(bit_field_1[2], 40, 8, "RW", 0, 8'h00, 1, 2, "")
`rggen_ral_create_field(bit_field_1[3], 56, 8, "RW", 0, 8'h00, 1, 3, "")
endfunction
function void setup_index_fields();
setup_index_field("register_0.bit_field_0", array_index[0]);
setup_index_field("register_0.bit_field_1", array_index[1]);
setup_index_field("register_0.bit_field_2", 1'h0);
endfunction
endclass
class register_12_reg_model extends rggen_ral_indirect_reg;
rand rggen_ral_field bit_field_0;
rand rggen_ral_field bit_field_1;
function new(string name);
super.new(name, 64, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 1, "RW", 0, 1'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 32, 1, "RW", 0, 1'h0, 1, -1, "")
endfunction
function void setup_index_fields();
setup_index_field("register_0.bit_field_2", 1'h1);
endfunction
endclass
class register_13_reg_model extends rggen_ral_reg;
rand rggen_ral_custom_field #("DEFAULT", "DEFAULT", 0, 0) bit_field_0;
rand rggen_ral_custom_field #("DEFAULT", "NONE", 0, 0) bit_field_1;
rand rggen_ral_custom_field #("DEFAULT", "DEFAULT", 1, 0) bit_field_2;
rand rggen_ral_custom_field #("DEFAULT", "DEFAULT", 0, 0) bit_field_3;
rand rggen_ral_custom_field #("CLEAR", "SET_1", 0, 0) bit_field_4;
rand rggen_ral_custom_field #("SET", "CLEAR_1", 0, 0) bit_field_5;
rand rggen_ral_custom_field #("DEFAULT", "SET_1", 0, 1) bit_field_6;
rand rggen_ral_custom_field #("DEFAULT", "CLEAR_1", 0, 1) bit_field_7;
rand rggen_ral_custom_field #("DEFAULT", "DEFAULT", 0, 1) bit_field_8;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 2, "CUSTOM", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_1, 2, 2, "CUSTOM", 1, 2'h0, 0, -1, "")
`rggen_ral_create_field(bit_field_2, 4, 2, "CUSTOM", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_3, 6, 2, "CUSTOM", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_4, 8, 2, "CUSTOM", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_5, 10, 2, "CUSTOM", 0, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_6, 12, 2, "CUSTOM", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_7, 14, 2, "CUSTOM", 1, 2'h0, 1, -1, "")
`rggen_ral_create_field(bit_field_8, 16, 2, "CUSTOM", 1, 2'h0, 1, -1, "")
endfunction
endclass
class register_14_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 1, "RO", 1, 1'h0, 0, -1, "")
endfunction
endclass
class register_15_reg_model extends rggen_ral_reg;
rand rggen_ral_field bit_field_0;
function new(string name);
super.new(name, 32, 0);
endfunction
function void build();
`rggen_ral_create_field(bit_field_0, 0, 1, "WO", 0, 1'h0, 1, -1, "")
endfunction
endclass
class block_0_block_model #(
type REGISTER_17 = rggen_ral_block,
bit INTEGRATE_REGISTER_17 = 1
) extends rggen_ral_block;
rand register_0_reg_model register_0;
rand register_1_reg_model register_1;
rand register_2_reg_model register_2;
rand register_3_reg_model register_3;
rand register_4_reg_model register_4;
rand register_5_reg_model register_5;
rand register_6_reg_model register_6;
rand register_7_reg_model register_7;
rand register_8_reg_model register_8;
rand register_9_reg_model register_9;
rand register_10_reg_model register_10[4];
rand register_11_reg_model register_11[2][4];
rand register_12_reg_model register_12;
rand register_13_reg_model register_13;
rand register_14_reg_model register_14;
rand register_15_reg_model register_15;
rand REGISTER_17 register_17;
function new(string name);
super.new(name, 4, 0);
endfunction
function void build();
`rggen_ral_create_reg(register_0, '{}, 8'h00, "RW", "g_register_0.u_register")
`rggen_ral_create_reg(register_1, '{}, 8'h04, "RW", "g_register_1.u_register")
`rggen_ral_create_reg(register_2, '{}, 8'h08, "RO", "g_register_2.u_register")
`rggen_ral_create_reg(register_3, '{}, 8'h08, "WO", "g_register_3.u_register")
`rggen_ral_create_reg(register_4, '{}, 8'h0c, "RO", "g_register_4.u_register")
`rggen_ral_create_reg(register_5, '{}, 8'h10, "RW", "g_register_5.u_register")
`rggen_ral_create_reg(register_6, '{}, 8'h14, "RW", "g_register_6.u_register")
`rggen_ral_create_reg(register_7, '{}, 8'h1c, "RW", "g_register_7.u_register")
`rggen_ral_create_reg(register_8, '{}, 8'h20, "RW", "g_register_8.u_register")
`rggen_ral_create_reg(register_9, '{}, 8'h28, "RW", "g_register_9.u_register")
`rggen_ral_create_reg(register_10[0], '{0}, 8'h30, "RW", "g_register_10.g[0].u_register")
`rggen_ral_create_reg(register_10[1], '{1}, 8'h38, "RW", "g_register_10.g[1].u_register")
`rggen_ral_create_reg(register_10[2], '{2}, 8'h40, "RW", "g_register_10.g[2].u_register")
`rggen_ral_create_reg(register_10[3], '{3}, 8'h48, "RW", "g_register_10.g[3].u_register")
`rggen_ral_create_reg(register_11[0][0], '{0, 0}, 8'h50, "RW", "g_register_11.g[0].g[0].u_register")
`rggen_ral_create_reg(register_11[0][1], '{0, 1}, 8'h50, "RW", "g_register_11.g[0].g[1].u_register")
`rggen_ral_create_reg(register_11[0][2], '{0, 2}, 8'h50, "RW", "g_register_11.g[0].g[2].u_register")
`rggen_ral_create_reg(register_11[0][3], '{0, 3}, 8'h50, "RW", "g_register_11.g[0].g[3].u_register")
`rggen_ral_create_reg(register_11[1][0], '{1, 0}, 8'h50, "RW", "g_register_11.g[1].g[0].u_register")
`rggen_ral_create_reg(register_11[1][1], '{1, 1}, 8'h50, "RW", "g_register_11.g[1].g[1].u_register")
`rggen_ral_create_reg(register_11[1][2], '{1, 2}, 8'h50, "RW", "g_register_11.g[1].g[2].u_register")
`rggen_ral_create_reg(register_11[1][3], '{1, 3}, 8'h50, "RW", "g_register_11.g[1].g[3].u_register")
`rggen_ral_create_reg(register_12, '{}, 8'h50, "RW", "g_register_12.u_register")
`rggen_ral_create_reg(register_13, '{}, 8'h60, "RW", "g_register_13.u_register")
`rggen_ral_create_reg(register_14, '{}, 8'h70, "RW", "g_register_14.u_register")
`rggen_ral_create_reg(register_15, '{}, 8'h74, "RW", "g_register_15.u_register")
`rggen_ral_create_block(register_17, 8'h80, this, INTEGRATE_REGISTER_17)
endfunction
endclass
endpackage