Put WebAssembly in your washing machine
wasmachine is an implementation of the WebAssembly specification in a FPGA.
It follows a sequential 6-steps design.
Currently it's in an initial state but is able to exec some basic commands.
- Stack-based (calls, blocks and operands), variable-length CISC architecture following the WebAssembly spec design
- Implemented an "expanded" version of the binary format
- Inlined destination of blocks and branches labels
- Decoded LEB128 targets for
br_table
- Strict type-checking on runtime
- Optionally disable floating point, memory and 64 bits operations at instance time to generate a simpler core for smaller FPGAs
- NodeJS Madrid (ad-hoc spontaneous keynote at end of the main one :-P)
Implement integer mathematical operationsSupport for functions calling- Add a 64 bits FPU for the floating point operations
- Memory-based operations
- Modules loader in RAM
Replace usage of ROM for modules on RAM- Accept call of functions from outside
- Use a pipelined design
They can be automatically upgraded executing
make update-dependenciesIf you want to test all the modules at once with all the features enabled (the default build configuration), simply exec:
make testYou can also test the modules disabling some features using the parameters
argument, that will be directly passed to the iverilog executable:
make test parameters='-Pcpu_tb.HAS_FPU=0 -Pcpu_tb.USE_64B=0'