diff --git a/hw/top_earlgrey/data/chip_testplan.hjson b/hw/top_earlgrey/data/chip_testplan.hjson index 3bf79decc0616..a1e749a424e10 100644 --- a/hw/top_earlgrey/data/chip_testplan.hjson +++ b/hw/top_earlgrey/data/chip_testplan.hjson @@ -22,12 +22,12 @@ "sw/device/lib/crypto/data/crypto_testplan.hjson" // IP block specific top level test plans. - "hw/top_earlgrey/data/ip/chip_aes_testplan.hjson", "hw/top_earlgrey/data/ip/chip_adc_ctrl_testplan.hjson", + "hw/top_earlgrey/data/ip/chip_aes_testplan.hjson", + "hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson", "hw/top_earlgrey/data/ip/chip_aon_timer_testplan.hjson", "hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson", "hw/top_earlgrey/data/ip/chip_csrng_testplan.hjson", - "hw/top_earlgrey/data/ip/chip_sysrst_ctrl_testplan.hjson", "hw/top_earlgrey/data/ip/chip_edn_testplan.hjson", "hw/top_earlgrey/data/ip/chip_entropy_src_testplan.hjson", "hw/top_earlgrey/data/ip/chip_flash_ctrl_testplan.hjson", @@ -37,21 +37,21 @@ "hw/top_earlgrey/data/ip/chip_keymgr_testplan.hjson", "hw/top_earlgrey/data/ip/chip_kmac_testplan.hjson", "hw/top_earlgrey/data/ip/chip_lc_ctrl_testplan.hjson", + "hw/top_earlgrey/data/ip/chip_otbn_testplan.hjson", "hw/top_earlgrey/data/ip/chip_otp_ctrl_testplan.hjson", "hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson", "hw/top_earlgrey/data/ip/chip_rom_ctrl_testplan.hjson", "hw/top_earlgrey/data/ip/chip_rstmgr_testplan.hjson", + "hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson", + "hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson" "hw/top_earlgrey/data/ip/chip_rv_plic_testplan.hjson", "hw/top_earlgrey/data/ip/chip_rv_timer_testplan.hjson", "hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson", "hw/top_earlgrey/data/ip/chip_spi_host_testplan.hjson", "hw/top_earlgrey/data/ip/chip_sram_ctrl_testplan.hjson", + "hw/top_earlgrey/data/ip/chip_sysrst_ctrl_testplan.hjson", "hw/top_earlgrey/data/ip/chip_uart_testplan.hjson", "hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson", - "hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson", - "hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson" - "hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson", - "hw/top_earlgrey/data/ip/chip_otbn_testplan.hjson", ] testpoints: [ diff --git a/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson b/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson index dcdc63d39e6b7..bee9b47fa7ab8 100644 --- a/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson +++ b/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson @@ -266,7 +266,7 @@ bazel: [ "//sw/device/tests/crypto:aes_sideload_functest", "//sw/device/tests/crypto:aes_kwp_sideload_functest", - "//sw/device/tests/crypto:keymgr_sideload_aes_test", + "//sw/device/tests:keymgr_sideload_aes_test", ] } { diff --git a/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson b/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson index 26c715fdc2835..d7b472e8d3c38 100644 --- a/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson +++ b/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson @@ -109,7 +109,6 @@ lc_states: ["PROD"] tests: [] bazel: [ - "//sw/device/tests/crypto/cryptotest:hash_kat", "//sw/device/tests/crypto:hmac_sha256_functest", ] } diff --git a/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson b/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson index b57cc12560dcc..d870b93ae1b24 100644 --- a/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson +++ b/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson @@ -79,10 +79,9 @@ `wakeup_en` CSR, bring the chip to normal sleep, optionally disabling the source's clock, have the source issue a wakeup event and verify `wake_info` indicates the expected wakeup. - SiVal: No need to run this, run chip_sw_pwrmgr_random_sleep_all_wake_ups instead. ''' stage: V2 - si_stage: NA + si_stage: SV3 tests: ["chip_sw_pwrmgr_normal_sleep_all_wake_ups"] bazel: ["//sw/device/tests:pwrmgr_normal_sleep_all_wake_ups"] } @@ -135,10 +134,9 @@ This verifies ALL wake up sources. This also verifies that the pwrmgr sequencing is working correctly as expected. X-ref'ed with all individual IP tests. Similar to chip_pwrmgr_sleep_all_wake_ups, except `control.main_pd_n` is set to 0. - SiVal: No need to run this, run chip_sw_pwrmgr_random_sleep_all_wake_ups instead. ''' stage: V2 - si_stage: NA + si_stage: SV3 tests: ["chip_sw_pwrmgr_deep_sleep_all_wake_ups"] bazel: ["//sw/device/tests:pwrmgr_deep_sleep_all_wake_ups"] } @@ -160,7 +158,7 @@ No need to run this, run chip_sw_pwrmgr_random_sleep_all_reset_reqs instead. ''' stage: V2 - si_stage: NA + si_stage: SV3 features: [ "PWRMGR.LOW_POWER.ENTRY", "PWRMGR.LOW_POWER.DISABLE_POWER" diff --git a/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson b/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson index d96f186a674a3..6702308832553 100644 --- a/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson +++ b/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson @@ -99,7 +99,7 @@ - Clears the busy bit to allow the upstream SPI host to proceed to the next command. ''' stage: V2 - si_stage: SV3 + si_stage: NA lc_states: [ "PROD" ] features: [ "SPI_DEVICE.MODE.PASSTHROUGH", @@ -161,7 +161,7 @@ which is why the "features" list is empty. It may be reclassifed in the future. ''' stage: V3 - si_stage: None + si_stage: SV3 lc_states: [ "PROD" ] features: ["SPI_DEVICE.CFG", "SPI_DEVICE.JEDEC_CC", diff --git a/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson b/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson index 04263cdb48b23..9da7ebb7d46d4 100644 --- a/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson +++ b/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson @@ -110,7 +110,7 @@ si_stage: SV3 lc_states: ["PROD"] tests: [] - bazel: ["//sw/device/tests:usbdev_sof_test"] + bazel: [] } { name: chip_sw_usbdev_setup_rx @@ -339,7 +339,7 @@ si_stage: SV3 lc_states: ["PROD"] tests: [] - bazel: ["//sw/device/tests:usbdev_suspend_resume_test"] + bazel: [] } { name: chip_sw_usbdev_aon_wake_reset @@ -422,7 +422,7 @@ si_stage: SV3 lc_states: ["PROD"] tests: [] - bazel: ["//sw/device/tests:usbdev_toggle_restore_test"] + bazel: [] } ] } diff --git a/sw/device/tests/sival/BUILD b/sw/device/tests/sival/BUILD index 19239e1150cb6..70b7c2a7700df 100644 --- a/sw/device/tests/sival/BUILD +++ b/sw/device/tests/sival/BUILD @@ -2,13 +2,12 @@ # Licensed under the Apache License, Version 2.0, see LICENSE for details. # SPDX-License-Identifier: Apache-2.0 -# See sw/device/tests/doc/sival/README.md#running-test-suites for details on -# how to run SV test suites across execution environments. - test_suite( name = "sv1_tests", tests = [ "//sw/device/silicon_creator/rom/e2e/jtag_inject:rom_e2e_openocd_debug_test", + "//sw/device/tests:lc_ctrl_otp_hw_cfg0_test", + "//sw/device/tests:pwrmgr_smoketest", "//sw/device/tests:rstmgr_cpu_info_test", "//sw/device/tests:rv_core_ibex_epmp_test_functest", "//sw/device/tests:rv_core_ibex_isa_test", @@ -20,31 +19,36 @@ test_suite( test_suite( name = "sv2_tests", tests = [ + "//sw/device/silicon_creator/lib:otbn_boot_services_functest", "//sw/device/tests:aes_smoketest", - "//sw/device/tests:alert_handler_lpg_clkoff_test", - "//sw/device/tests:alert_handler_lpg_reset_toggle_test", "//sw/device/tests:aon_timer_irq_test", "//sw/device/tests:aon_timer_smoketest", "//sw/device/tests:aon_timer_wdog_bite_reset_test", "//sw/device/tests:ast_clk_outs_test", + "//sw/device/tests:clkmgr_external_clk_src_for_sw_fast_test", + "//sw/device/tests:clkmgr_external_clk_src_for_sw_slow_test", "//sw/device/tests:clkmgr_smoketest", - "//sw/device/tests:csrng_edn_concurrency_test", "//sw/device/tests:csrng_smoketest", "//sw/device/tests:entropy_src_csrng_test", "//sw/device/tests:entropy_src_smoketest", + "//sw/device/tests:gpio_pinmux_test", "//sw/device/tests:gpio_smoketest", + "//sw/device/tests:hmac_enc_test", "//sw/device/tests:hmac_smoketest", "//sw/device/tests:i2c_target_test", - "//sw/device/tests:keymgr_key_derivation_test", "//sw/device/tests:keymgr_sideload_otbn_simple_test", + "//sw/device/tests:keymgr_sideload_otbn_test", + "//sw/device/tests:kmac_mode_kmac_test", "//sw/device/tests:kmac_smoketest", "//sw/device/tests:otbn_smoketest", - "//sw/device/tests:pwrmgr_random_sleep_all_reset_reqs_test", - "//sw/device/tests:pwrmgr_random_sleep_all_wake_ups", + "//sw/device/tests:otp_ctrl_smoketest", + "//sw/device/tests:pattgen_ios_test", + "//sw/device/tests:pmp_smoketest_napot", + "//sw/device/tests:pmp_smoketest_tor", + "//sw/device/tests:power_virus_systemtest", "//sw/device/tests:pwrmgr_smoketest", + "//sw/device/tests:pwrmgr_usbdev_smoketest", "//sw/device/tests:pwrmgr_wdog_reset_reqs_test", - "//sw/device/tests:rstmgr_alert_info_test", - "//sw/device/tests:rstmgr_cpu_info_test", "//sw/device/tests:rstmgr_smoketest", "//sw/device/tests:rv_core_ibex_nmi_irq_test", "//sw/device/tests:rv_dm_jtag_tap_sel", @@ -53,13 +57,21 @@ test_suite( "//sw/device/tests:rv_dm_ndm_reset_req", "//sw/device/tests:rv_plic_smoketest", "//sw/device/tests:rv_timer_smoketest", + "//sw/device/tests:sleep_pwm_pulses_test", + "//sw/device/tests:spi_host_smoketest", "//sw/device/tests:spi_host_winbond_flash_test", - "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_no_scramble_test", - "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_scramble_test", "//sw/device/tests:sram_ctrl_smoketest", "//sw/device/tests:uart_smoketest", "//sw/device/tests:uart_tx_rx_test", + "//sw/device/tests/autogen:plic_all_irqs_test_0", + "//sw/device/tests/autogen:plic_all_irqs_test_10", + "//sw/device/tests/autogen:plic_all_irqs_test_20", + "//sw/device/tests/crypto:aes_kwp_functest", + "//sw/device/tests/crypto:aes_kwp_kat_functest", + "//sw/device/tests/crypto:ecdh_p256_sideload_functest", + "//sw/device/tests/crypto:ecdsa_p256_sideload_functest", "//sw/device/tests/pmod:i2c_host_eeprom_test", + "//sw/device/tests/pmod:spi_host_macronix_flash_test", ], ) @@ -72,13 +84,16 @@ test_suite( "//sw/device/tests:alert_handler_lpg_clkoff_test", "//sw/device/tests:alert_handler_lpg_reset_toggle_test", "//sw/device/tests:alert_handler_lpg_sleep_mode_pings_test", + "//sw/device/tests:alert_handler_ping_ok_test", "//sw/device/tests:alert_handler_ping_timeout_test", "//sw/device/tests:alert_handler_reverse_ping_in_deep_sleep_test", - "//sw/device/tests:aon_timer_irq_test", "//sw/device/tests:aon_timer_sleep_wdog_sleep_pause_test", + "//sw/device/tests:aon_timer_wdog_bite_reset_test", "//sw/device/tests:aon_timer_wdog_lc_escalate_test", "//sw/device/tests:ast_clk_outs_test", + "//sw/device/tests:chip_power_idle_load", "//sw/device/tests:clkmgr_jitter_frequency_test", + "//sw/device/tests:clkmgr_jitter_test", "//sw/device/tests:clkmgr_off_aes_trans_test", "//sw/device/tests:clkmgr_off_hmac_trans_test", "//sw/device/tests:clkmgr_off_kmac_trans_test", @@ -86,8 +101,7 @@ test_suite( "//sw/device/tests:clkmgr_off_peri_test", "//sw/device/tests:clkmgr_reset_frequency_test", "//sw/device/tests:clkmgr_sleep_frequency_test", - "//sw/device/tests:coverage_test", - "//sw/device/tests:crt_test", + "//sw/device/tests:csrng_edn_concurrency_test", "//sw/device/tests:csrng_kat_test", "//sw/device/tests:edn_auto_mode", "//sw/device/tests:edn_boot_mode", @@ -95,36 +109,50 @@ test_suite( "//sw/device/tests:edn_sw_mode", "//sw/device/tests:entropy_src_ast_rng_req_test", "//sw/device/tests:entropy_src_edn_reqs_test", + "//sw/device/tests:entropy_src_fw_observe_many_contiguous_test", + "//sw/device/tests:entropy_src_fw_override_test", "//sw/device/tests:entropy_src_fw_ovr_test", "//sw/device/tests:entropy_src_kat_test", - "//sw/device/tests:example_concurrency_test", "//sw/device/tests:flash_ctrl_clock_freqs_test", "//sw/device/tests:flash_ctrl_idle_low_power_test", + "//sw/device/tests:flash_ctrl_info_access_lc_states", + "//sw/device/tests:flash_ctrl_info_access_lc_states_personalized", + "//sw/device/tests:flash_ctrl_mem_protection_test", "//sw/device/tests:flash_ctrl_ops_test", + "//sw/device/tests:flash_ctrl_rma_test", "//sw/device/tests:flash_ctrl_test", + "//sw/device/tests:flash_ctrl_write_clear_test", + "//sw/device/tests:gpio_intr_test", "//sw/device/tests:hmac_enc_idle_test", - "//sw/device/tests:hmac_enc_test", "//sw/device/tests:hmac_secure_wipe_test", + "//sw/device/tests:i2c_host_override_test", + "//sw/device/tests:i2c_target_test", + "//sw/device/tests:keymgr_key_derivation_test", "//sw/device/tests:keymgr_sideload_aes_test", "//sw/device/tests:keymgr_sideload_kmac_test", - "//sw/device/tests:keymgr_sideload_otbn_simple_test", - "//sw/device/tests:keymgr_sideload_otbn_test", + "//sw/device/tests:kmac_endianess_test", "//sw/device/tests:kmac_idle_test", + "//sw/device/tests:kmac_kmac_key_sideload_test", "//sw/device/tests:kmac_mode_cshake_test", - "//sw/device/tests:kmac_mode_kmac_test", "//sw/device/tests:otbn_ecdsa_op_irq_test", "//sw/device/tests:otbn_irq_test", + "//sw/device/tests:otbn_isa_test", "//sw/device/tests:otbn_mem_scramble_test", "//sw/device/tests:otbn_randomness_test", "//sw/device/tests:otbn_rsa_test", + "//sw/device/tests:otbn_smoketest", "//sw/device/tests:plic_sw_irq_test", - "//sw/device/tests:power_virus_systemtest", "//sw/device/tests:pwrmgr_all_reset_reqs_test", "//sw/device/tests:pwrmgr_deep_sleep_all_reset_reqs_test", + "//sw/device/tests:pwrmgr_deep_sleep_all_wake_ups", "//sw/device/tests:pwrmgr_deep_sleep_por_reset_test", + "//sw/device/tests:pwrmgr_normal_sleep_all_reset_reqs_test", + "//sw/device/tests:pwrmgr_normal_sleep_all_wake_ups", "//sw/device/tests:pwrmgr_normal_sleep_por_reset_test", + "//sw/device/tests:pwrmgr_random_sleep_all_reset_reqs_test", "//sw/device/tests:pwrmgr_random_sleep_all_wake_ups", "//sw/device/tests:pwrmgr_sleep_disabled_test", + "//sw/device/tests:pwrmgr_sleep_wake_5_bug_test", "//sw/device/tests:pwrmgr_usb_clk_disabled_when_active_test", "//sw/device/tests:pwrmgr_wdog_reset_reqs_test", "//sw/device/tests:rstmgr_alert_info_test", @@ -132,23 +160,92 @@ test_suite( "//sw/device/tests:rstmgr_sw_rst_ctrl_test", "//sw/device/tests:rv_core_ibex_address_translation_test", "//sw/device/tests:rv_core_ibex_icache_invalidate_test", + "//sw/device/tests:rv_dm_access_after_hw_reset", + "//sw/device/tests:rv_dm_access_after_wakeup", + "//sw/device/tests:rv_dm_control_status", + "//sw/device/tests:rv_dm_csr_rw", + "//sw/device/tests:rv_dm_dtm", "//sw/device/tests:rv_dm_jtag", - "//sw/device/tests:rv_dm_ndm_reset_req", + "//sw/device/tests:rv_dm_mem_access", + "//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted", "//sw/device/tests:rv_timer_smoketest", "//sw/device/tests:rv_timer_systick_test", "//sw/device/tests:sensor_ctrl_alert_test", "//sw/device/tests:sensor_ctrl_wakeup_test", - "//sw/device/tests:sleep_pwm_pulses_test", + "//sw/device/tests:sleep_pin_mio_dio_val_test", + "//sw/device/tests:sleep_pin_retention_test", + "//sw/device/tests:spi_device_flash_smoketest", + "//sw/device/tests:spi_device_sleep_test", "//sw/device/tests:spi_device_tpm_tx_rx_test", + "//sw/device/tests:spi_host_config_test", + "//sw/device/tests:spi_host_irq_test", + "//sw/device/tests:spi_passthru_test", + "//sw/device/tests:sram_ctrl_execution_test", + "//sw/device/tests:sram_ctrl_lc_escalation_test", "//sw/device/tests:sram_ctrl_memset_test", "//sw/device/tests:sram_ctrl_readback_test", + "//sw/device/tests:sram_ctrl_scrambled_access_test", "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_no_scramble_test", + "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_scramble_test", "//sw/device/tests:sram_ctrl_subword_access_test", + "//sw/device/tests:sysrst_ctrl_ec_rst_l_test", + "//sw/device/tests:sysrst_ctrl_in_irq_test", + "//sw/device/tests:sysrst_ctrl_inputs_test", + "//sw/device/tests:sysrst_ctrl_outputs_test", + "//sw/device/tests:sysrst_ctrl_reset_test", + "//sw/device/tests:sysrst_ctrl_ulp_z3_wakeup_test", + "//sw/device/tests:uart_baud_rate_test", + "//sw/device/tests:uart_loopback_test", + "//sw/device/tests:uart_parity_break_test", + "//sw/device/tests:usbdev_aon_pullup_test", + "//sw/device/tests:usbdev_aon_wake_disconnect_test", + "//sw/device/tests:usbdev_aon_wake_reset_test", + "//sw/device/tests:usbdev_config_host_test", + "//sw/device/tests:usbdev_iso_test", + "//sw/device/tests:usbdev_mixed_test", + "//sw/device/tests:usbdev_pincfg_test", + "//sw/device/tests:usbdev_pullup_test", + "//sw/device/tests:usbdev_setuprx_test", + "//sw/device/tests:usbdev_stream_test", + "//sw/device/tests:usbdev_test", + "//sw/device/tests:usbdev_vbus_test", "//sw/device/tests/autogen:alert_test", + "//sw/device/tests/autogen:plic_all_irqs_test_0", + "//sw/device/tests/crypto:aes_functest", + "//sw/device/tests/crypto:aes_kwp_sideload_functest", + "//sw/device/tests/crypto:aes_sideload_functest", + "//sw/device/tests/crypto:ecdh_p256_sideload_functest", + "//sw/device/tests/crypto:ecdh_p384_sideload_functest", + "//sw/device/tests/crypto:ecdsa_p256_sideload_functest", + "//sw/device/tests/crypto:ecdsa_p384_sideload_functest", + "//sw/device/tests/crypto:hmac_functest", + "//sw/device/tests/crypto:hmac_multistream_functest", + "//sw/device/tests/crypto:hmac_sha256_functest", + "//sw/device/tests/crypto:hmac_sha384_functest", + "//sw/device/tests/crypto:hmac_sha512_functest", + "//sw/device/tests/crypto:kmac_functest_hardcoded", + "//sw/device/tests/crypto:kmac_sideload_functest_hardcoded", + "//sw/device/tests/crypto/cryptotest:hmac_sha256_kat", + "//sw/device/tests/crypto/cryptotest:hmac_sha384_kat", + "//sw/device/tests/crypto/cryptotest:hmac_sha512_kat", + "//sw/device/tests/crypto/cryptotest:kmac_kat", + "//sw/device/tests/crypto/cryptotest:sha3_256_kat", + "//sw/device/tests/crypto/cryptotest:sha3_384_kat", + "//sw/device/tests/crypto/cryptotest:sha3_512_kat", + "//sw/device/tests/crypto/cryptotest:shake128_kat", + "//sw/device/tests/crypto/cryptotest:shake256_kat", + "//sw/device/tests/pmod:i2c_host_clock_stretching_test", "//sw/device/tests/pmod:i2c_host_fram_test", ], ) +test_suite( + name = "sv4_tests", + tests = [ + "//third_party/coremark/top_earlgrey:coremark_test", + ], +) + test_suite( name = "regression_test_suite", tests = [ @@ -156,7 +253,7 @@ test_suite( ":sv1_tests", ":sv2_tests", ":sv3_tests", - + ":sv4_tests", # Crypto test suites. "//sw/device/tests/crypto:cryptolib_test_suite", ],