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[darjeeling,sim] Enable top-dependent SIM config
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Signed-off-by: Robert Schilling <[email protected]>
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@Razer6 @andreaskurth
Razer6 authored and andreaskurth committed Nov 22, 2024
1 parent cea3b34 commit 32a974b
Showing 1 changed file with 16 additions and 16 deletions.
32 changes: 16 additions & 16 deletions hw/top_darjeeling/dv/top_darjeeling_sim_cfgs.hjson
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Original file line number Diff line number Diff line change
Expand Up @@ -29,12 +29,12 @@
"{proj_root}/hw/ip/hmac/dv/hmac_sim_cfg.hjson",
"{proj_root}/hw/ip/i2c/dv/i2c_sim_cfg.hjson",
"{proj_root}/hw/ip/keymgr/dv/keymgr_sim_cfg.hjson",
// "{proj_root}/hw/ip/keymgr_dpe/dv/keymgr_dpe_sim_cfg.hjson",
"{proj_root}/hw/ip/keymgr_dpe/dv/keymgr_dpe_sim_cfg.hjson",
"{proj_root}/hw/ip/kmac/dv/kmac_masked_sim_cfg.hjson",
"{proj_root}/hw/ip/kmac/dv/kmac_unmasked_sim_cfg.hjson",
"{proj_root}/hw/ip/lc_ctrl/dv/lc_ctrl_volatile_unlock_disabled_sim_cfg.hjson",
"{proj_root}/hw/ip/lc_ctrl/dv/lc_ctrl_volatile_unlock_enabled_sim_cfg.hjson",
// "{proj_root}/hw/ip/mbx/dv/mbx_sim_cfg.hjson",
"{proj_root}/hw/ip/lc_ctrl/dv/lc_ctrl_dmi_volatile_unlock_disabled_sim_cfg.hjson",
"{proj_root}/hw/ip/lc_ctrl/dv/lc_ctrl_dmi_volatile_unlock_enabled_sim_cfg.hjson",
"{proj_root}/hw/ip/mbx/dv/mbx_sim_cfg.hjson",
"{proj_root}/hw/ip/otbn/dv/uvm/otbn_sim_cfg.hjson",
"{proj_root}/hw/ip/otp_ctrl/dv/otp_ctrl_sim_cfg.hjson",
"{proj_root}/hw/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson",
Expand All @@ -48,22 +48,22 @@
"{proj_root}/hw/ip/rv_timer/dv/rv_timer_sim_cfg.hjson",
"{proj_root}/hw/ip/spi_host/dv/spi_host_sim_cfg.hjson",
"{proj_root}/hw/ip/spi_device/dv/spi_device_1r1w_sim_cfg.hjson",
"{proj_root}/hw/ip/spi_device/dv/spi_device_2p_sim_cfg.hjson",
// "{proj_root}/hw/ip/spi_device/dv/spi_device_2p_sim_cfg.hjson",
"{proj_root}/hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson",
"{proj_root}/hw/ip/sram_ctrl/dv/sram_ctrl_ret_sim_cfg.hjson",
"{proj_root}/hw/ip/uart/dv/uart_sim_cfg.hjson",
// Top level IPs.
// "{proj_root}/hw/top_darjeeling/ip_autogen/alert_handler/dv/alert_handler_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip_autogen/clkmgr/dv/clkmgr_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip_autogen/flash_ctrl/dv/flash_ctrl_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip_autogen/pwrmgr/dv/pwrmgr_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip_autogen/rstmgr/dv/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip_autogen/rstmgr/dv/rstmgr_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip/xbar_dbg/dv/autogen/xbar_dbg_sim_cfg.hjson",
// "{proj_root}/hw/top_darjeeling/ip/xbar_mbx/dv/autogen/xbar_mbx_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip_autogen/alert_handler/dv/alert_handler_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip_autogen/clkmgr/dv/clkmgr_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip_autogen/flash_ctrl/dv/flash_ctrl_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip_autogen/pwrmgr/dv/pwrmgr_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip_autogen/rstmgr/dv/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip_autogen/rstmgr/dv/rstmgr_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip/xbar_dbg/dv/autogen/xbar_dbg_sim_cfg.hjson",
"{proj_root}/hw/top_darjeeling/ip/xbar_mbx/dv/autogen/xbar_mbx_sim_cfg.hjson",
// // Top level.
// "{proj_root}/hw/top_darjeeling/dv/chip_sim_cfg.hjson"
"{proj_root}/hw/top_darjeeling/dv/chip_sim_cfg.hjson"
]
}

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