From 0a6b3573170a8519e64e60e66ee1c3935085c208 Mon Sep 17 00:00:00 2001
From: Jahan Addison <jahan@jahanaddison.com>
Date: Tue, 26 May 2020 05:10:47 -0400
Subject: [PATCH] Update README.md

---
 README.md | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/README.md b/README.md
index 8d37ce9..b641a63 100644
--- a/README.md
+++ b/README.md
@@ -24,14 +24,8 @@ The 6800 has a 16-bit address bus that can directly access 64 kB of memory and a
 I am considering designing a DSL compiler in haskell or C to do the instruction -> opcode translation state machine.
 
 * Interrupt flag and instructions (wont do)
-* Direct addressing opcodes
-    - ☑ Lexer/Parser complete
-* Extended addressing mode opcodes
-    - ☑ Lexer/Parser complete
-* Indexed addressing mode opcodes
-    - ☑ Lexer/Parser complete
 * DATA and rom directives
-    - Needs Lexer/Parser extension
+    - Needs Parser extension
 * 65 of the 72 ISA opcode mnemonic translations
 
 Pull requests are welcome!