From 4f46d27a46e0c0590a7ec842f00d5b9875a641bc Mon Sep 17 00:00:00 2001 From: Rodrigo Garcia Date: Sat, 23 Nov 2024 19:10:38 -0300 Subject: [PATCH] fix(uart): fixes issue with update baudrate higher than 250000 --- cores/esp32/esp32-hal-uart.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c index 706124c7451..fb8444484dd 100644 --- a/cores/esp32/esp32-hal-uart.c +++ b/cores/esp32/esp32-hal-uart.c @@ -34,6 +34,7 @@ #include "esp_rom_gpio.h" static int s_uart_debug_nr = 0; // UART number for debug output +#define REF_TICK_BAUDRATE_LIMIT 250000 // this is maximum UART badrate using REF_TICK as clock struct uart_struct_t { @@ -522,7 +523,7 @@ uart_t *uartBegin( #if SOC_UART_SUPPORT_XTAL_CLK uart_config.source_clk = UART_SCLK_XTAL; // valid for C2, S3, C3, C6, H2 and P4 #elif SOC_UART_SUPPORT_REF_TICK - if (baudrate <= 250000) { + if (baudrate <= REF_TICK_BAUDRATE_LIMIT) { uart_config.source_clk = UART_SCLK_REF_TICK; // valid for ESP32, S2 - MAX supported baud rate is 250 Kbps } else { uart_config.source_clk = UART_SCLK_APB; // baudrate may change with the APB Frequency! @@ -804,6 +805,10 @@ void uartSetBaudRate(uart_t *uart, uint32_t baud_rate) { return; } UART_MUTEX_LOCK(); +#if !SOC_UART_SUPPORT_XTAL_CLK + soc_module_clk_t newClkSrc = baud_rate <= REF_TICK_BAUDRATE_LIMIT ? SOC_MOD_CLK_REF_TICK : SOC_MOD_CLK_APB; + uart_ll_set_sclk(UART_LL_GET_HW(uart->num), newClkSrc); +#endif if (uart_set_baudrate(uart->num, baud_rate) == ESP_OK) { uart->_baudrate = baud_rate; } else {