Version 1.8
This version fixes an issue regarding on how I-RAM (SA-1 internal RAM) is set up on boot code. At boot time, the I-RAM write stays disabled and you must enable it before making writes. However, my boot time attempts setting up the data bank register (DBR) that requires a stack operation (PHA - PLB) and the PHA opcode requires writing to I-RAM. Because write is disabled, the write is ignored and the DBR receives an undefined value instead (likely static randomic), which made some games not boot up at all. Contra III in particular never booted up on hardware because it requires the DBR to be 0x05 since the beginning, while Gradius III and Super R-Type had mixed results on hardware.
Now that the root cause has been found and fixed, Contra III, Gradius III and Super R-Type should work as expected on real hardware.
Games included:
- Contra III v1.2
- Gradius III v1.7
- Super R-Type v1.2
- Race Drivin' v1.1
How to Patch
See https://sneslab.net/wiki/How_to_apply_ROM_patches
You can also patch the .asm files directly using Asar.
It works with both American and Japanese version of Gradius III.
And the American version of Contra III, Super R-Type and Race Drivin'.