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mPCIE_to_CAN.kicad_pcb
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mPCIE_to_CAN.kicad_pcb
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(kicad_pcb (version 20171130) (host pcbnew "(5.1.9)-1")
(general
(thickness 1.6)
(drawings 60)
(tracks 600)
(zones 0)
(modules 24)
(nets 11)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user hide)
(41 Cmts.User user hide)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user hide)
(46 B.CrtYd user hide)
(47 F.CrtYd user hide)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
(last_trace_width 0.25)
(user_trace_width 0.4)
(user_trace_width 0.5)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 5.8 5.8)
(pad_drill 2.6)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements 7FFFF7FF)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "../Gerber/"))
)
(net 0 "")
(net 1 GND)
(net 2 +3V3)
(net 3 USB_DP)
(net 4 USB_DM)
(net 5 "Net-(R1-Pad1)")
(net 6 "Net-(R2-Pad1)")
(net 7 "Net-(J2-Pad2)")
(net 8 "Net-(J3-Pad4)")
(net 9 "Net-(J3-Pad3)")
(net 10 "Net-(R3-Pad1)")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net GND)
(add_net "Net-(J2-Pad2)")
(add_net "Net-(J3-Pad3)")
(add_net "Net-(J3-Pad4)")
(add_net "Net-(R1-Pad1)")
(add_net "Net-(R2-Pad1)")
(add_net "Net-(R3-Pad1)")
(add_net USB_DM)
(add_net USB_DP)
)
(module miniPCIE:break-tabs (layer F.Cu) (tedit 60DA40B5) (tstamp 60DA6378)
(at 227.1738 52.1692)
(fp_text reference REF** (at -2.54 -6.35) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value break-tabs (at -2.032 -7.62) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" np_thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 1.27 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 3.81 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 5.08 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 2.54 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60DA62C6)
(at 218.36 70.9398 270)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D9A843)
(attr smd)
(fp_text reference R3 (at 0 1.43 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 0R (at 0 -1.43 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(pad 1 smd roundrect (at -0.9125 0 270) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(R3-Pad1)"))
(pad 2 smd roundrect (at 0.9125 0 270) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module miniPCIE:JST_SH_2pin_1.00mm (layer B.Cu) (tedit 60D8DCE7) (tstamp 60DA629E)
(at 212.137 63.7516 90)
(path /60D9707B)
(fp_text reference J2 (at -2.5146 -0.4826) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value DC_connector (at 5.08 6.985 -90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 2.5654 0.0254) (end 1.5494 0.0254) (layer B.SilkS) (width 0.12))
(fp_line (start 2.5654 -2.7686) (end 2.5654 0.0254) (layer B.SilkS) (width 0.12))
(fp_line (start -0.4826 -4.5466) (end 1.5494 -4.5466) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4986 0.0254) (end -1.4986 -2.7686) (layer B.SilkS) (width 0.12))
(fp_line (start -0.4826 0.0254) (end -1.4986 0.0254) (layer B.SilkS) (width 0.12))
(pad 1 smd rect (at 0 0 90) (size 0.6 1.55) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0 90) (size 0.6 1.55) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(J2-Pad2)"))
(pad 1 smd rect (at 2.3 -3.875 90) (size 1.2 1.8) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -1.3 -3.875 90) (size 1.2 1.8) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
)
(module miniPCIE:IDC_10 (layer F.Cu) (tedit 60D870B1) (tstamp 60DA626A)
(at 214.6262 59.4844)
(path /60D8BDB7)
(fp_text reference J3 (at -6.1976 1.8542) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value IDC_10 (at 3.3274 -7.6454) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -5.07 3.28) (end -5.07 -5.82) (layer F.SilkS) (width 0.12))
(fp_line (start -5.07 3.28) (end 15.23 3.28) (layer F.SilkS) (width 0.12))
(fp_line (start -5.07 -5.82) (end 15.23 -5.82) (layer F.SilkS) (width 0.12))
(fp_line (start 15.23 3.28) (end 15.23 -5.82) (layer F.SilkS) (width 0.12))
(fp_line (start 3.81 2.54) (end 6.35 2.54) (layer F.SilkS) (width 0.12))
(fp_line (start 6.35 2.54) (end 6.35 3.28) (layer F.SilkS) (width 0.12))
(fp_line (start 3.81 2.54) (end 3.81 3.28) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 2.54 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)
(net 9 "Net-(J3-Pad3)"))
(pad 5 thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)
(net 1 GND))
(pad 7 thru_hole circle (at 7.62 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at 10.16 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 2.54 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)
(net 8 "Net-(J3-Pad4)"))
(pad 10 thru_hole circle (at 10.16 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 5.08 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at 7.62 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 0 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
)
(module miniPCIE:MH (layer F.Cu) (tedit 60DA3A60) (tstamp 60DA624E)
(at 209.0128 36.5482)
(fp_text reference REF** (at 0 -7.62) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MH (at 0 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" thru_hole rect (at 0.19344 -0.7046) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask)
(net 1 GND))
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60DA622A)
(at 224.329 72.1336 180)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D819F4)
(attr smd)
(fp_text reference R2 (at 2.794 -0.127) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 22R (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(pad 1 smd roundrect (at -0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 6 "Net-(R2-Pad1)"))
(pad 2 smd roundrect (at 0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 3 USB_DP))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60DA61FA)
(at 218.2838 62.4562 180)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D991B3)
(attr smd)
(fp_text reference R4 (at 0 1.43) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 0R (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(pad 1 smd roundrect (at -0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(R3-Pad1)"))
(pad 2 smd roundrect (at 0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 7 "Net-(J2-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module miniPCIE:CAN_DONGLE (layer F.Cu) (tedit 60D4841E) (tstamp 60DA61C6)
(at 208.41336 78.18388)
(path /60D3D5C2)
(fp_text reference U1 (at -1.02616 -2.39268) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CAN_DONGLE (at 13.08608 -6.9469) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 0) (end 0 -14.6) (layer F.SilkS) (width 0.12))
(fp_line (start 0 0) (end 26.6 0) (layer F.SilkS) (width 0.12))
(fp_line (start 26.6 0) (end 26.6 -14.6) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -14.6) (end 26.6 -14.6) (layer F.SilkS) (width 0.12))
(pad 5 thru_hole circle (at 2.475 -1.143) (size 1.75 1.75) (drill 1.25) (layers *.Cu *.Mask)
(net 1 GND))
(pad 1 thru_hole oval (at 2.348 -9.445 90) (size 1.9812 3.9624) (drill 1.3208) (layers *.Cu *.Mask)
(net 9 "Net-(J3-Pad3)"))
(pad 2 thru_hole oval (at 2.348 -4.445 90) (size 1.9812 3.9624) (drill 1.3208) (layers *.Cu *.Mask)
(net 8 "Net-(J3-Pad4)"))
(pad 4 thru_hole oval (at 7.936 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 10.476 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 13.016 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 8 thru_hole rect (at 15.556 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 "Net-(R3-Pad1)"))
(pad 6 thru_hole circle (at 21.64988 -6.09686 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 6 "Net-(R2-Pad1)"))
(pad 5 thru_hole circle (at 21.64988 -3.55686 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 1 GND))
(pad 7 thru_hole circle (at 21.64988 -8.12886 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 5 "Net-(R1-Pad1)"))
(pad 8 thru_hole circle (at 21.64988 -10.66886 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 10 "Net-(R3-Pad1)"))
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60DA6194)
(at 224.456 70.1016 180)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D7C9CE)
(attr smd)
(fp_text reference R1 (at 2.921 0) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 22R (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(pad 1 smd roundrect (at -0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 5 "Net-(R1-Pad1)"))
(pad 2 smd roundrect (at 0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 4 USB_DM))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module miniPCIE:break-tabs (layer F.Cu) (tedit 60DA40B5) (tstamp 60DA6174)
(at 210.3844 52.1692)
(fp_text reference REF** (at -2.54 -6.35) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value break-tabs (at -2.032 -7.62) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" np_thru_hole circle (at 2.54 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 5.08 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 3.81 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 1.27 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
)
(module miniPCIE:MH (layer F.Cu) (tedit 60DA3975) (tstamp 60DA6164)
(at 233.1682 36.5736)
(fp_text reference REF** (at 0 -7.62) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MH (at 0 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" thru_hole rect (at 0.2032 -0.73) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask)
(net 1 GND))
)
(module miniPCIE:mPCIE (layer F.Cu) (tedit 60D46AEC) (tstamp 60DA60D0)
(at 216.709 83.8938)
(descr "half size mini PCI Express")
(path /60D52B6A)
(fp_text reference J1 (at -3.175 -6.9342) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value miniPCIE (at -6.3119 2.30378) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_arc (start 0.75 -3.25) (end 1.5 -3.25) (angle -180) (layer Dwgs.User) (width 0.05))
(fp_arc (start -8.74992 -2.70002) (end -8.74992 -3.20002) (angle 90) (layer Dwgs.User) (width 0.05))
(fp_arc (start 17.9498 -2.7004) (end 17.4498 -2.7004) (angle 90) (layer Dwgs.User) (width 0.05))
(fp_line (start 0.75 -3.25) (end 1.5 -3.25) (layer Dwgs.User) (width 0.05))
(fp_line (start 0 -3.25) (end 0 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 1.5 -3.25) (end 1.5 0) (layer Dwgs.User) (width 0.05))
(fp_line (start -8.25 0) (end 0 0) (layer Dwgs.User) (width 0.05))
(fp_line (start -10.4 -26.8) (end 4.6 -26.8) (layer Dwgs.User) (width 0.05))
(fp_line (start 4.6 -26.8) (end 19.6 -26.8) (layer Dwgs.User) (width 0.05))
(fp_line (start 19.6 -26.8) (end 19.6 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start -10.4 -26.8) (end -10.4 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start -10.4 -3.2) (end -8.25 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start -8.25 -3.2) (end -8.25 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 17.45 -3.2) (end 19.6 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start 17.45 -3.2) (end 17.45 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 1.5 0) (end 17.45 0) (layer Dwgs.User) (width 0.05))
(pad 13 smd rect (at -2.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 15 smd rect (at -1.6 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 11 smd rect (at -3.2 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 9 smd rect (at -4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 7 smd rect (at -4.8 -1.397 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 5 smd rect (at -5.6 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 3 smd rect (at -6.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 1 smd rect (at -7.2 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 17 smd rect (at 2.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 19 smd rect (at 3.2 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 21 smd rect (at 4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 23 smd rect (at 4.8 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 25 smd rect (at 5.6 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 27 smd rect (at 6.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 29 smd rect (at 7.2 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 31 smd rect (at 8 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 33 smd rect (at 8.8 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 35 smd rect (at 9.6 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 37 smd rect (at 10.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 39 smd rect (at 11.2 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 2 +3V3) (solder_mask_margin 0.1) (clearance 0.1))
(pad 41 smd rect (at 12 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 2 +3V3) (solder_mask_margin 0.1) (clearance 0.1))
(pad 43 smd rect (at 12.8 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 45 smd rect (at 13.6 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 47 smd rect (at 14.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 49 smd rect (at 15.2 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 51 smd rect (at 16.002 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 16 smd rect (at -1.2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 18 smd rect (at 2.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 14 smd rect (at -2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 12 smd rect (at -2.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 10 smd rect (at -3.6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 8 smd rect (at -4.4 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 6 smd rect (at -5.2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 4 smd rect (at -6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 2 smd rect (at -6.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 2 +3V3) (solder_mask_margin 0.1) (clearance 0.1))
(pad 20 smd rect (at 3.6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 22 smd rect (at 4.4 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 24 smd rect (at 5.2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 2 +3V3) (solder_mask_margin 0.1) (clearance 0.1))
(pad 26 smd rect (at 6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 28 smd rect (at 6.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 30 smd rect (at 7.6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 32 smd rect (at 8.4 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 34 smd rect (at 9.2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 36 smd rect (at 10 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 USB_DM) (solder_mask_margin 0.1) (clearance 0.1))
(pad 38 smd rect (at 10.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 USB_DP) (solder_mask_margin 0.1) (clearance 0.1))
(pad 40 smd rect (at 11.6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 42 smd rect (at 12.4 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 44 smd rect (at 13.2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 46 smd rect (at 14 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 48 smd rect (at 14.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 50 smd rect (at 15.6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 52 smd rect (at 16.4 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 2 +3V3) (solder_mask_margin 0.1) (clearance 0.1))
(pad 53 thru_hole rect (at 16.6624 -23.8506) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask)
(net 1 GND))
)
(module miniPCIE:break-tabs (layer F.Cu) (tedit 60DA40B5) (tstamp 60DA4183)
(at 175.2854 52.1716)
(fp_text reference REF** (at -2.54 -6.35) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value break-tabs (at -2.032 -7.62) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" np_thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 1.27 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 3.81 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 5.08 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 2.54 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
)
(module miniPCIE:break-tabs (layer F.Cu) (tedit 60DA40B5) (tstamp 60DA4135)
(at 192.0748 52.1716)
(fp_text reference REF** (at -2.54 -6.35) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value break-tabs (at -2.032 -7.62) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" np_thru_hole circle (at 2.54 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 5.08 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 3.81 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 1.27 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.6) (layers *.Cu *.Mask))
)
(module miniPCIE:MH (layer F.Cu) (tedit 60DA3A60) (tstamp 60DA3A7A)
(at 173.9138 36.5506)
(fp_text reference REF** (at 0 -7.62) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MH (at 0 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" thru_hole rect (at 0.19344 -0.7046) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask)
(net 1 GND))
)
(module miniPCIE:MH (layer F.Cu) (tedit 60DA3975) (tstamp 60DA399A)
(at 198.0692 36.576)
(fp_text reference REF** (at 0 -7.62) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value MH (at 0 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad "" thru_hole rect (at 0.2032 -0.73) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask)
(net 1 GND))
)
(module miniPCIE:IDC_10 (layer F.Cu) (tedit 60D870B1) (tstamp 60D8F8C3)
(at 179.5272 59.4868)
(path /60D8BDB7)
(fp_text reference J3 (at -6.1976 1.8542) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value IDC_10 (at 3.3274 -7.6454) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 3.81 2.54) (end 3.81 3.28) (layer F.SilkS) (width 0.12))
(fp_line (start 6.35 2.54) (end 6.35 3.28) (layer F.SilkS) (width 0.12))
(fp_line (start 3.81 2.54) (end 6.35 2.54) (layer F.SilkS) (width 0.12))
(fp_line (start 15.23 3.28) (end 15.23 -5.82) (layer F.SilkS) (width 0.12))
(fp_line (start -5.07 -5.82) (end 15.23 -5.82) (layer F.SilkS) (width 0.12))
(fp_line (start -5.07 3.28) (end 15.23 3.28) (layer F.SilkS) (width 0.12))
(fp_line (start -5.07 3.28) (end -5.07 -5.82) (layer F.SilkS) (width 0.12))
(pad 2 thru_hole circle (at 0 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at 7.62 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 5.08 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at 10.16 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 2.54 -2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)
(net 8 "Net-(J3-Pad4)"))
(pad 9 thru_hole circle (at 10.16 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at 7.62 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 5.08 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole circle (at 2.54 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)
(net 9 "Net-(J3-Pad3)"))
(pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60D8F925)
(at 183.1848 62.4586 180)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D991B3)
(attr smd)
(fp_text reference R4 (at 0 1.43) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 0R (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(pad 2 smd roundrect (at 0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 7 "Net-(J2-Pad2)"))
(pad 1 smd roundrect (at -0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(R3-Pad1)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60D8F914)
(at 183.261 70.9422 270)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D9A843)
(attr smd)
(fp_text reference R3 (at 0 1.43 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 0R (at 0 -1.43 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(pad 2 smd roundrect (at 0.9125 0 270) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(pad 1 smd roundrect (at -0.9125 0 270) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(R3-Pad1)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module miniPCIE:JST_SH_2pin_1.00mm (layer B.Cu) (tedit 60D8DCE7) (tstamp 60D8F8AE)
(at 177.038 63.754 90)
(path /60D9707B)
(fp_text reference J2 (at -2.5146 -0.4826) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value DC_connector (at 5.08 6.985 -90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.4826 0.0254) (end -1.4986 0.0254) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4986 0.0254) (end -1.4986 -2.7686) (layer B.SilkS) (width 0.12))
(fp_line (start -0.4826 -4.5466) (end 1.5494 -4.5466) (layer B.SilkS) (width 0.12))
(fp_line (start 2.5654 -2.7686) (end 2.5654 0.0254) (layer B.SilkS) (width 0.12))
(fp_line (start 2.5654 0.0254) (end 1.5494 0.0254) (layer B.SilkS) (width 0.12))
(pad 1 smd rect (at -1.3 -3.875 90) (size 1.2 1.8) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at 2.3 -3.875 90) (size 1.2 1.8) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0 90) (size 0.6 1.55) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(J2-Pad2)"))
(pad 1 smd rect (at 0 0 90) (size 0.6 1.55) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
)
(module miniPCIE:CAN_DONGLE (layer F.Cu) (tedit 60D4841E) (tstamp 60D42A1D)
(at 173.31436 78.18628)
(path /60D3D5C2)
(fp_text reference U1 (at -1.02616 -2.39268) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CAN_DONGLE (at 13.08608 -6.9469) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 -14.6) (end 26.6 -14.6) (layer F.SilkS) (width 0.12))
(fp_line (start 26.6 0) (end 26.6 -14.6) (layer F.SilkS) (width 0.12))
(fp_line (start 0 0) (end 26.6 0) (layer F.SilkS) (width 0.12))
(fp_line (start 0 0) (end 0 -14.6) (layer F.SilkS) (width 0.12))
(pad 8 thru_hole circle (at 21.64988 -10.66886 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 10 "Net-(R3-Pad1)"))
(pad 7 thru_hole circle (at 21.64988 -8.12886 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 5 "Net-(R1-Pad1)"))
(pad 5 thru_hole circle (at 21.64988 -3.55686 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 1 GND))
(pad 6 thru_hole circle (at 21.64988 -6.09686 90) (size 1.50114 1.50114) (drill 1.00076) (layers *.Cu *.Mask)
(net 6 "Net-(R2-Pad1)"))
(pad 8 thru_hole rect (at 15.556 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 10 "Net-(R3-Pad1)"))
(pad 5 thru_hole oval (at 13.016 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 10.476 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at 7.936 -13.081 90) (size 1.7 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 2.348 -4.445 90) (size 1.9812 3.9624) (drill 1.3208) (layers *.Cu *.Mask)
(net 8 "Net-(J3-Pad4)"))
(pad 1 thru_hole oval (at 2.348 -9.445 90) (size 1.9812 3.9624) (drill 1.3208) (layers *.Cu *.Mask)
(net 9 "Net-(J3-Pad3)"))
(pad 5 thru_hole circle (at 2.475 -1.143) (size 1.75 1.75) (drill 1.25) (layers *.Cu *.Mask)
(net 1 GND))
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60D47981)
(at 189.23 72.136 180)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D819F4)
(attr smd)
(fp_text reference R2 (at 2.794 -0.127) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 22R (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(pad 2 smd roundrect (at 0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 3 USB_DP))
(pad 1 smd roundrect (at -0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 6 "Net-(R2-Pad1)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder (layer B.Cu) (tedit 5F68FEEE) (tstamp 60D47970)
(at 189.357 70.104 180)
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
(tags "resistor handsolder")
(path /60D7C9CE)
(attr smd)
(fp_text reference R1 (at 2.921 0) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 22R (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1))
(fp_line (start -0.254724 0.5225) (end 0.254724 0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -0.254724 -0.5225) (end 0.254724 -0.5225) (layer B.SilkS) (width 0.12))
(fp_line (start -1.65 -0.73) (end -1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 0.73) (end 1.65 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 0.73) (end 1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -0.73) (end -1.65 -0.73) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(pad 2 smd roundrect (at 0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 4 USB_DM))
(pad 1 smd roundrect (at -0.9125 0 180) (size 0.975 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 5 "Net-(R1-Pad1)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module miniPCIE:mPCIE (layer F.Cu) (tedit 60D46AEC) (tstamp 60D47AA6)
(at 181.61 83.8962)
(descr "half size mini PCI Express")
(path /60D52B6A)
(fp_text reference J1 (at -3.175 -6.9342) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value miniPCIE (at -6.3119 2.30378) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.5 0) (end 17.45 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 17.45 -3.2) (end 17.45 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 17.45 -3.2) (end 19.6 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start -8.25 -3.2) (end -8.25 0) (layer Dwgs.User) (width 0.05))
(fp_line (start -10.4 -3.2) (end -8.25 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start -10.4 -26.8) (end -10.4 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start 19.6 -26.8) (end 19.6 -3.2) (layer Dwgs.User) (width 0.05))
(fp_line (start 4.6 -26.8) (end 19.6 -26.8) (layer Dwgs.User) (width 0.05))
(fp_line (start -10.4 -26.8) (end 4.6 -26.8) (layer Dwgs.User) (width 0.05))
(fp_line (start -8.25 0) (end 0 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 1.5 -3.25) (end 1.5 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 0 -3.25) (end 0 0) (layer Dwgs.User) (width 0.05))
(fp_line (start 0.75 -3.25) (end 1.5 -3.25) (layer Dwgs.User) (width 0.05))
(fp_arc (start 17.9498 -2.7004) (end 17.4498 -2.7004) (angle 90) (layer Dwgs.User) (width 0.05))
(fp_arc (start -8.74992 -2.70002) (end -8.74992 -3.20002) (angle 90) (layer Dwgs.User) (width 0.05))
(fp_arc (start 0.75 -3.25) (end 1.5 -3.25) (angle -180) (layer Dwgs.User) (width 0.05))
(pad 53 thru_hole rect (at 16.6624 -23.8506) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask)
(net 1 GND))
(pad 52 smd rect (at 16.4 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 2 +3V3) (solder_mask_margin 0.1) (clearance 0.1))
(pad 50 smd rect (at 15.6 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND) (solder_mask_margin 0.1) (clearance 0.1))
(pad 48 smd rect (at 14.8 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 46 smd rect (at 14 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
(solder_mask_margin 0.1) (clearance 0.1))
(pad 44 smd rect (at 13.2 -1.4 270) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask)
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(pad 13 smd rect (at -2.4 -1.4 90) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask)
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