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Fabrication via Electron Beam Lithography
Lukas Chrostowski edited this page Mar 18, 2017
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Fabrication via this PDK is available via the edX silicon photonics course, and via direct purchase.
- The fabrication is performed by Shane Patrick at the Washington Nanofabrication Facility at the University of Washington, Seattle.
- The EBeam tool was purchased by a grant obtained by Prof. Michael Hochberg.
- The process development was performed by Richard Bojko and Michael Hochberg’s group.
- Numerous fabrication runs (30+) were performed by L. Chrostowski’s group at UBC, Prof. D. Ratner’s group, and others, since 2011, to stabilize the fabrication process and develop devices.
- Fabrication coordination and PDK are provided by the SiEPIC program – www.siepic.ubc.ca. The fabrication flow has been used by many research groups, some examples which are provided in this document below, and online at the UW web page.
- Details on the Ebeam and UW – https://ebeam.mff.uw.edu/ebeamweb
- Typical cost for a single chip is 1,000-4,000.
##Fabrication
- Soitec UNIBOND. 6”. Prime grade. 220 nm silicon with a 6 sigma of 22.3 nm. Buried Oxide thickness of 3.017 µm with a 6 sigma of 6 nm.
- Negative resist, HSQ – https://ebeam.mff.uw.edu/ebeamweb/process/processmain.html
- Pattered using a JEOL JBX-6300FS e-beam, with mask data prep performed by software “Beamer”. Using the 4th Lens Mode and Normal writing.
- Single full-etch using ICP
- 82º sidewall angle
- Minimum isolated feature size of 60 nm.
- Shot Pitch – Default is 6 nm. This is a “snapping” of all layout features to a 6 nm grid. Periodic structures, e.g., Bragg gratings, should use integer multiples of the Shot Pitch to avoid quantization errors. Smaller shot pitches (more expensive) and Shot pitch fracturing are available.
- Write conditions – 4th Lens, 2-pass field shift writing, with default 6 nm shot pitch, 8 nA beam current.
- Oxide cladding deposition, 2-3 µm, PECVD.
GDS# | Name | Description |
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1 | Si | Silicon 220 nm remaining.,Where drawn is 220 nm; elsewhere is 0 nm. Shot pitch = 6 nm.,Recommended for most silicon devices. |
2 | Text | Text labels for automated measurements. |
3 | SEM_ROI | SEM imaging requests (https://github.com/lukasc-ubc/SiEPIC_EBeam_PDK/wiki/Fabrication-via-Electron-Beam-Lithography#sem-images) |
4 | Si_p6nm | Fabricated at the same time as Layer “Si”, except with Shot Pitch Fracturing of 1 nm. Cost is similar to Layer “Si”. See description below. Recommended for Bragg gratings. Layer is perfectly aligned to Layer “Si”. |
5 | Si_p2nm | Fabricated at the same time as Layer “Si”, but not aligned to Layer “Si”. Shot Pitch = 2 nm. Cost is 8X higher than Layer “Si”. |
6 | Floorplan | Indicate the assigned area for your layout with a rectangle. |
There are numerous tools that can produce the GDS files required for fabrication. The following is a description of several tools used by SiEPIC researchers:
KLayout
- Free software.
- Tutorial for EBeam
- https://ebeam.mff.uw.edu/ebeamweb/training/cad_tut_main/cad_tutorial_main.html
- Download from http://www.klayout.de/
- Offers scripting capabilities, including PCells
- http://www.klayout.de/doc/about/about_pcells.html
- PDK for KLayout https://github.com/lukasc-ubc/SiEPIC_EBeam_PDK
- Design Rule Checking file provided “KLayout_EBeam_DRC.rtf”. Load the DRC file
- http://www.klayout.de/doc/manual/drc_basic.html#h2-172
Mentor Graphics
- Commercial EDA (Electronic Design Automation) tools.
- Mentor Graphics Pyxis – for mask layout
- Mentor Graphics Calibre – for verification
- PDKs available for EBeam, IME and imec fabrication.
MatlabGDSPhotonicsToolbox
- Free toolbox using commercial Matlab software
- http://www.mathworks.in/matlabcentral/fileexchange/46827-nicolasayotte-matlabgdsphotonicstoolbox
- Specifically designed for silicon photonics. Includes automated waveguide routing. Scripted components. PDKs for various processes including EBeam.
##SEM Images
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SEM images available upon request, at an additional cost (typically 5 incremental cost per image + setup time)
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Instrument: SEM JEOL JSM-7400; cold-field emission; operated at conditions near where the current of electrons emitted from the chip is not too different from the incident beam current which is typically 20-22 kV for the low beam currents used.
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SEM image requests are done by:
- https://ebeam.mff.uw.edu/ebeamweb/remote/remote/sem_inspection_sites.html
- Drawing a rectangle around the area of interest, on layer “SEM_ROI”. Choose the size based on available ones.
- Add a text label with a name, on layer “SEM_ROI”
- Add an arrow on layer “Si” to help locate the device.
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See example file “SEM/SEM.GDS”