Releases: RPCS3/rpcs3
v0.0.14 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.13 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.12 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
This changelog lists the main changes made since v0.0.11 by chronological order, comprising 62 days of development with 213 commits
What's new since v0.0.11 (highlights):
» Implemented Online Netplay (sceNp) functionality!
» CPU many CPU emulation accuracy and performance improvements
» GPU many GPU emulation accuracy and performance improvements
» GUI many GUI bug fixes, improvements and additions
» Audio Implemented downmix to 5.1, made most audio settings modifiable mid game
» AVX-512 Added support and some optimized paths for Icelake AVX-512
» Debugger Simplification and usability improvements
» Input Added pad squircle, stick multipliers and stick emulation preview to Pad Settings
» Input Support for Namco GCon3 gun
» GPU Video memory management overhaul introduced to handle memory overload scenarios, when the GPU is almost out of memory multiple techniques are used to free as much resources as possible
» OpenGL Fixed an issue where around 20% of a shaders cache would be skipped on load when using the OpenGL render
» Overlay Fixed cropped text on overlay elements such as trophy pop-ups
Index
» Core
» CPU (Cell)
» GPU (RSX)
» Audio
» Network
» Input
» Native UI (RSX Overlay)
» GUI
» Miscellaneous
Changelog
Core
– Always use Emu.Quit() to exit RPCS3 (#8550)
– Make "Prevent display sleep while running game" a dynamic setting (#8550)
– Fix sceNpDrmGetTimelimit invalid parameter error (#8561)
– Log RawSPU MMIO reads and writes (#8572)
– Set applied patch log level to success (#8582)
– Implement constexpr byteswapping and make bit_cast constexpr in simple cases (#8501)
– Ensure aligned 64k allocations in utils::memory_reserve (#8598)
– Make spu_thread::offset private (#8598)
– Set executable hash log level to success (#8610)
– Increase lv2 sleep time on cellSaveData (#8507)
– Replace s32 for error_code return type on several HLE modules (#8594)
– Fix sceNpCommerce2CreateCtx logging message (#8594)
– Use not_an_error in sys_spinlock_trylock (#8594)
– Fix is_constructible test (#8627)
– Fix some clang warnings (#8629)
– Improve error handling during config loading (#8647)
– Move cheats.yml to patches folder and improve parser errors (#8641)
– Don't open an error dialog in headless mode (#8648)
– Gracefully abort headless mode with unsupported video renderers (#8658)
– Minor fix of "unspecific ppu" path of _sys_lwcond_signal, restrict unspecific ppu path to u64(UINT32_MAX) ppu id only, before it was every id that the lower 32-bits of the id were equal to UINT32_MAX such as UINT64_MAX (#8661)
– Make some config logs error instead of fatal, avoids conflict between work in progress builds with new settings (#8677)
– Add config override as cli arg: --config (#8676)
– Replace ppu_module_manager Function Static with Class Static variable (#8669)
– Log localusername (#8699)
– Fix loss of "BLIST" and files' information in Save Data PARAM.SFO (#8706)
– Add support for compiling on MSVC x64 toolchain and change optimisation flag from Ox to O2 (#8732)
– Fix a virtual memory reservation update bug that incremented reservation timestamp unconditionally even when lock bits were set (#8736)
CPU
– Fix barrier commands enqueuing on SPU LLVM (#8544)
– Fix function stack bounds check on PPU Debugger (#8549)
– Show stack address of each function on PPU Debugger (#8549)
– Optimizations for reservation locks and check_state for the non-TSX path (#8358)
– Disable PUTLLC NOP transfers detection for the TSX path (#8358)
– Implement SPU GETLLAR polling detection (#8358)
– Fix SPU MFC WrTagUpdate channel count. Always report available, in real hardware this is just a hint if the previous tag update has not yet been checked by the MFC, avoiding blocking writes and allowing the SPU to execute some code while it processes the previous update request, except for MFC_TAG_UPDATE_IMMEDIATE, where it also waits for MFC to process it (#8543)
– Never clear tag status and optimize non-constant tag update requests in WrTagUpdate (#8543)
– Optimize Local Storage loads and stores on SPU LLVM. By allowing the SPU Local Storage to wrap around on addressing overflows around 256k+- offsets stores/loads are allowed to not mask the immediate value after the calculating the sum of addresses.
This makes it use a native, single x86 memory address calculation instruction (e.g. as a LEA instruction) instead of separating it into different instructions and masking it every time (#8592)
– Avoid unnecessary clamping in some situations on SPU LLVM by trying to verify when the FM instruction will produce a result in normalized range for x86 floating point hardware, and avoiding clamping the result when it's used by another instruction (#8397)
– Use direct waitable atomics notifications on each SPU channel instead of relying on the global thread-specific notification system (#8507)
– Improve expressions matching on PPU and SPU Translators, enabling simple usage of expressions matching on PPU LLVM, while also allowing to detect more match expressions for SPU LLVM (#8620)
– Support enabled Non-Java mode, which originally behaves like FTZ (Flush-To-Zero) and DAZ (Denormals-Are-Zero) both enabled on x86 (#8617)
– Fix "PPU LLVM Accurate Vector NaN values" to actually respect the settings' value on LLVM which previously was unconditionally enabled in most cases (#8617)
– Fix PPU DIVW, DIVWU, MULHW, MULLW and MULHWU instructions when op.rc is set (#8630)
– Optimize PPU VSEL and SPU SELB with constant mask, we can emit Select instead of a series of instructions when the constant mask doesn't need bit granularity (#8559)
– Avoid some redundant endian swapping on SPU LLVM. When games load a piece of data, and then use SHUFB to transform it, we can handle this case by using PSHUFB with no transformation, since the reversed byte order of the mask when interpreted by PSHUFB is actually advantageous in this situation (#8537)
– Simplify some SPU code using byte broadcast (#8638)
– Fix SPU thread cpu_stop missed executions. If the SPU thread was stopped VERY early in its execution it won't even enter spu_thread::cpu_task() which was needed for it to call spu_thread::cpu_stop(). To fix this move it to be a callback of cpu_flag::ret and add this flag to all threads' state when stopping them. Fixes potential deadlocks in sys_spu_thread_group_join etc when cpu_stop() is not called (#8656)
– Implement SPU Thread option 0x2 SYS_SPU_THREAD_OPTION_DEC_SYNC_TB_ENABLE. If specified in sys_spu_thread_initialize, SPU timestamp is always equal to one's complement of the lower 32-bits of PPU timestamp (#8657)
– Fix CPU Translator get_const_vector. Add support for 128-bit integers, construct it using the base llvm::APInt, fix the use of llvm::ConstantExpr, we cannot evaluate it as constant data (#8652)
– Fix VMAXFP, VMINFP NaN handling on PPU LLVM (#8659)
– Fix VMAXFP NaN and signed zeroes handling on PPU Interpreters (#8659)
– Improve CPU Translator fre and frsqe functions to accept unevaluated expressions, evaluate them in-place (#8659)
– Add detection for Icelake-client tier AVX-512 (#8700)
– Fix FMA signed zeroes handling on PPU and SPU LLVM (#8694)
– Fix signed zeroes handling on Accurate XFloat on SPU LLVM (#8694)
– Use AVX-512 VPERM2B to emulate VPERM on PPU LLVM, saves on 2 pshufbs, 1 shift, and 1 blend (#8704)
– Implement RSX accurate reservations on TSX path (#8721)
– Improve 0 addend FMA detection, add missing cases for +-0 for CPUs which do not support hardware FMA (#8709)
– Optimize PPU VNMSUBFP hardware FMA path (#8709)
– Add AVX-512 icelake optimized paths for SPU LLVM SHUFB instruction (#8712)
– Improve SPU LLVM FCGT Approximate XFloat path, fix a few bugs with +- extended SPU floats range (x86 NaNs), whilst improving performance in theory because of removing all vector constants dependencies and allowing out-of-order execution for most steps, add optimization regarding nonzero constants (#8728)
– Fix PPU debugger stepping on non-TSX path (#8749)
– Fix SPU timer events. The event was fired as long as the value was negative and as long as ch_dec_value was 0 (#8754)
– Implement PPU SLWI, SRWI, SLDI mnemonics on debugger, should get rid of most of raw rotate and mask instructions in favour of simple forms (#8750)
– Fix bugs related to SPU events not succeeding to acknowledge events or discarding events, by collecting all events occured right before certain points (#8771)
– Do not check all SPU events when we don't need to (#8771)
RSX
– Fix leaking ZCull queries after barrier by processing all queries before completing the barrier (#8538)
– Implement fast ZCull barrier when the query object is already known (#8538)
– Fix transfer descriptors for partially overlapping slices in head, readable height must be corrected to skip the piece that exists before the current slice (#8545)
– Unifies ZCull command completion code, allows conditionals to be evaluated with a forwarder present (#8555)
– vulkan: Inject memory barrier upon conclusion of a framebuffer feedback loop, do not write to the texture until previous draw call is completed using it (#8563)
– Support partial texture descriptors, it is safe to declare width > pitch and it works as long as sampling inside the legal 2D area is obeyed (#8568)
– Allow depth bounds test to ...
v0.0.11 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.10 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.9 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.8 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.7 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.6 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
Note: These are NOT stable builds. RPCS3 is a rolling release software without stable builds. These are random tags we do from time to time. Do NOT use the branch from these tags to package RPCS3.
Changelog TBA, will be announced when published
v0.0.5 Alpha
Please note that our version increases are landmarks and not stable builds
Always download the latest build from https://rpcs3.net/download
This changelog lists the main changes made since v0.0.4, mostly (but not always) by chronological order
What's new since v0.0.4 (tl;dr):
» Removed SSSE3 dependencies! RPCS3 now works with any x64 CPU. Obviously, CPUs without SSSE3 are too slow for RPCS3;
» Ryzen 5/7 performance improvements on Windows! Added internal thread scheduler for Ryzen as Windows' scheduler for Ryzen CPUs is faulty (Linux was already working properly!);
» Native user interface! You no longer need to reach your keyboard for GUI actions (excluding on-screen-keyboard actions which are not implemented yet) when playing with a controller;
» Huge Input Improvements! Greatly improved customization of all input options (XInput, MMJoy, DualShock 4, evdev);
» Multiple Input Profiles! You no longer need to change input settings every time you change to a game that requires a different layout;
» Huge Compatibility and Performance Improvements!
» Tons of awaited games finally started working!
» More AVX-512 Support! Added AVX-512 code-paths to ASMJIT Recompiler. Also added more AVX2 code-paths.
» More XOP Support! Added XOP code-paths to ASMJIT Recompiler.
» Game List Compatibility column! Database is now included on download for Windows builds, you can now easily see the status for your games (Linux users can easily download the database!);
» Removed PSP2 (PS Vita) code. A dedicated PS Vita project has emerged, therefore we chose to abandon the idea of PSP2 emulation inside RPCS3 and focus solely on PS3. If you're interested on PSVita emulation, visit Vita3K. Maybe one day when RPCS3 is very matured, PSP2 (PS Vita) emulation comes back, who knows.
» Uniformized version counter! No more confusions! RPCS3 now uses commit count everywhere instead of using TravisCI and AppVeyor individual build counters on file names. Build strings for Windows and AppImage binaries are now the same.
» And TONS of Bugfixes as always!
Index
» Core
» PPU
» SPU
» RSX
» Audio
» Native UI (RSX Overlay)
» Trophies
» Firmware (HLE)
» Network
» Input
» GUI
» Windows
» Linux + BSD
» Linux
» BSD
» Misc
Changelog
Core
– Optimized CPUID checks;
– Fixed fs::dir with constant begin/end;
– Fixed cond_variable timeout;
– Fixed "Exit RPCS3 when process finishes" command line crash;
– Improved Restart function – should now work correctly with game launchers;
– Added warning when corrupted PARAM.SFO is detected;
– Added installation for additional packages on game boot (INSDIR, PKGDIR, PS3_EXTRA);
– Removed /app_home/ dependency;
– Improved logging messages for multiple RPCS3 instances;
– Refactored logging mechanisms;
– Restored log compression;
– PKG installer update for DLC: Don't ask for overwriting, Limit cancellation capabilities;
– Improved check for cellSurmixer event queue (some games do not set event queue name, though key seems constant for them);
– Implemented setting for maximum threads to be used on LLVM compilation (default: All);
– CPUTranslator: Added bitcast, trunc, zext, sext;
– Added option to manage thread placement. Makes an impact on windows when using Ryzen processors, most other CPUs should be unaffected. Linux does a better job on its own so the option is not recommended on Linux;
– Handles exceptions at game list update, fixed RPCS3 not starting when corrupted PARAM.SFO is present;
– Handles exceptions at loading patch.yml file, fixed RPCS3 not starting when bad patch.yml file is present;
– Initial cpu_translator implementation;
– Returns CELL_ENOSYS on unpresented syscalls;
– Removed PSP2 (PS Vita) code;
PPU
– Use shared jit_compiler instance – fixes deregisterEHFrames error message on Linux;
– Disassembler: Added db8cyc, db10cyc, db12cyc, db16cyc opcodes;
– Remove SSSE3 dependency;
– Fixed primary stack size;
– PPU LLVM: rewrote add/sub instructions: Uses new patterns for saturation instructions, Avoids ZExt/SExt completely;
– PPU LLVM: rewrote AVG instructions;
SPU
– sys_spu_thread_group_create: If priority is between 16 and 255, make sure type is not SYS_SPU_THREAD_GROUP_TYPE_EXCLUSIVE_NON_CONTEXT;
– SPU ASMJIT: Interrupt optimizations - Pigeonhole optimize for branching pattern that is used to enable and disable interrupts used in code, this should lower amount of blocks that are compiled and avoid falling out of a block. Recompiled interrupt check in some cases to stay in block instead of falling out to dispatcher;
– MFC: Fixed support for list transfer stall bit with partial support for out of order execution - also give Sync commands a size so they are properly detected by queue checks;
– Fixed interrupt jump check, also change interrupt variable to atomic bool for ease of setting/checking;
– Interpreter/Recompiler: Implemented DFCMGT;
– SPU ASMJIT: Rewritten ROTH AVX-512 implementation;
– Fixed Size and Tag clamping;
– Allow reading of the RdSRR0 channel;
– Allow writing to the WrSSR0 channel;
– Remove SSSE3 dependency;
– SPU ASMJIT: Added AVX-512 support to ROT, ROTM, ROTMA, SHL, ROTH, ROTHM, ROTMAH, SHLH, CLZ, SHUFB, CFLTU, CUFLT, BG, NOR, ROTI, CG, NAND, CGTH, CLGTH instructions;
– SPU ASMJIT: Reordered some instructions for better throughput;
– Redesigned LVSL and LVSR instructions;
– Interpreter/Recompiler: Fixes for ROTM, ROTMA, SHL, ROTH, ROTHM, ROTMAH, SHLH, ROTQMBYBI, ROTQMBY instructions;
– SPU/MFC: Checks for sync command before doing a list transfer;
– SPU ASMJIT: Added AVX2 support to ROT, ROTM, ROTMA, SHL instructions;
– SPU ASMJIT: Added support for 16-bit shifts using AVX2 (ROTHM, ROTMAH, SHLH);
– SPU ASMJIT: Added support for XOP instruction set on ROT, ROTM, ROTMA, SHL, ROTH, ROTHM, ROTMAH, SHLH, ROTI, SELB, SHUFB instructions;
– Emit VZEROUPPER: Workaround dirty AVX high state;
– SPU ASMJIT: Rewrote ORX instruction;
– SPU ASMJIT: Minor change to ROTH instruction: Only AVX-512 path is changed (third version). This instruction is extremely rare;
– SPU ASMJIT: rewrote 128-bit shifts by bit: Six instructions changed to use xmm registers instead of gpr. ROTQBII, ROTQMBII, SHLQBII look better (shifts by imm). ROTQBI, ROTQMBI, SHLQBI changed for consistency (shifts by variable);
– Removed redundant and harming check from tag update completion type 2 condition;
– Implemented Stop Code 0x100;
– sys_spu_thread_get_exit_status: Implemented missing check, now checks CELL_ESTAT condition as well;
– Disassembler: Clamps SPU address - allows the SPU disassembler to nicely wrap around addresses instead of reporting "illegal address" on addresses outside of LS and resolves potential memory conflicts with main storage memory in the debugger;
RSX
– Optimized frame limiter;
– Improved nv406e::semaphore_release;
– Added WIP research into getting WCB (Write Color Buffers) working correctly. Should now mostly work correctly on OpenGL and correctly on Vulkan where on swizzle contexts are involved;
– Enables blitting from main memory to local (RSX) memory using hardware acceleration. A few more titles no longer need the slow WCB path for this;
– Fixed a bug where NVIDIA drivers would leak memory leak when window was minimized;
– Fixed FP (Fragment Program) to take into account data range modifiers in SRC1. Fixes negative color values getting to the tone-mapping passes in some games (e.g. Dark Souls 2);
– Do not discard depth buffer is stencil test is enabled (e.g. Vesperia);
– Enabled ZCull conditional render on Vulkan;
– Fixed D3D12 compiler crashes introduced by previous changes;
– Fixed shader cache constantly compiling new shaders in some games;
– Fixed default vertex attributes for undefined reads (e.g. Eternal Sonata, Ni no Kuni);
– Fixed OpenGL texture flickering due to broken optimization path when WCB was enabled;
– Synchronizes access to the present/graphics queue during submit. It's simpler to just use a global lock in this case since at the moment we only use one queue and contention only happens during submit. Should fix some cases of device_lost when running NVIDIA + WCB;
– Implemented depth clamp;
– Fixes for stencil surface configuration when address is contested;
– Work on depth/color address resolve when address contention happens;
– Implemented ZCull on the Vulkan render;
– Shader overlay implementation allowing all kinds of transforms and passes;
– Implemented binding color data for depth access for example using a RGBA->depth casting pass;
– Fixed face winding on OpenGL;
– Fragment program decompiler fixes for pack/unpack with optional register gathering implemented;
– Fixed potential crash in image_in when using CPU blit, or when unable to GPU scale the texture;
– Avoids unprotecting memory unless writing is almost guaranteed to be near immediate. Should lower chances of race conditions on sections leading to corruption, but this is not a final fix. Should greatly reduce chances of encountering;
– Fix for framebuffer setup: Ignore stencil flag if current depth format does not support stencil operation;
– Fixed depth clipping: Should now correctly scale/offset z for viewport, which may help in random clipping issues. tested game doesn't work on master without hacks (e.g. Vancouver 2010) but this fixes graphics display in it;
– Fixed image_in arg decoding / swizzle: Fixes x/y decoding, fixes some psl1ght blitting samples. After seeing countless...