Unknown SoC, Technology, and Microarchitecture on SpacemiT K1/M1 #286

cwt · 2024-09-12T08:50:18Z

Output from cpufetch --verbose

$ cpufetch --verbose
[WARNING]: parse_cpuinfo_field: Unable to find field uarch              : 
[WARNING]: get_uarch_from_cpuinfo: Unable to detect microarchitecture, cpuinfo_str is NULL
[WARNING]: SoC detection failed using device tree: Found 'k1-x' string

                                                               SoC:                 Unknown
                                                               Technology:          Unknown
                                ************                   Microarchitecture:   Unknown
                    %%%%%%%%%    ***********                   Cores:               8 cores
                    %%%%%%%%%%   **********                    Max Frequency:       1.800 GHz
                    %%%%%%%%%    *********                     Extensions:          rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
                    %           ********                        - (I) Integer Instruction Set
                    %%      .*********     %                    - (M) Integer Multiplication and Division
                    %%%%     *******     %%%                    - (A) Atomic Instructions
                    %%%%%%.    ****    %%%%%                    - (F) Single-Precision Floating-Point
                    %%%%%%%%.        %%%%%%%                    - (D) Double-Precision Floating-Point
                                                                - (C) Compressed Instructions
                                                                - (V) Vector Operations
 ###########   ##   .#########    #########   .##           ##  - (Sscofpmf) Count OverFlow and Privilege Mode Filtering
 ##        ##  ##  ##           ##              ###       ###   - (Sstc) S and VS level Time Compare
 ###########   ##  ##########. ##          ####  .##     ##     - (Svpbmt) Page-based Memory Types
 ##     ###    ##           ##. ##                 ### ###      - (Zicbom) Cache Block Management Operations
 ##       ###  ##  ##########.   ##########          ###        - (Zihintpause) Pause Hint
                                                                - (Zicboz) Cache Block Zero Operations
                                                                - (Zicbop) Cache Block Prefetch Operations
                                                               Peak Performance:    14.40 GFLOP/s

FYI: SpacemiT M1 is using the same core as K1, but higher frequency.

The text was updated successfully, but these errors were encountered:

Dr-Noob · 2024-09-12T20:37:53Z

Thanks for the report, can you post the output of cat /proc/cpuinfo?

cwt · 2024-09-13T02:38:00Z

Thanks for the report, can you post the output of cat /proc/cpuinfo?

$ cat /proc/cpuinfo 
processor	: 0
hart		: 0
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 1
hart		: 1
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 2
hart		: 2
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 3
hart		: 3
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 4
hart		: 4
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 5
hart		: 5
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 6
hart		: 6
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

processor	: 7
hart		: 7
model name	: Spacemit(R) X60
isa		: rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
mmu		: sv39
mvendorid	: 0x710
marchid		: 0x8000000058000001
mimpid		: 0x1000000049772200

Dr-Noob · 2024-09-22T21:36:30Z

I've pushed a fix in branch i290 which should show the logo and SoC name now.

Can you also provide the output of hexdump -C /proc/device-tree/compatible? I assume marchid could be used to detect the microarchitecture but not sure how. Do you have any idea?

Also, I used your logo but it's too big indeed. Width is fine I think but it's too tall, it shouldn't be taller than 18 characters long.

cwt · 2024-09-23T03:33:52Z

Can you also provide the output of hexdump -C /proc/device-tree/compatible? I assume marchid could be used to detect the microarchitecture but not sure how. Do you have any idea?

$ hexdump -C /proc/device-tree/compatible
00000000  73 70 61 63 65 6d 69 74  2c 6b 31 2d 78 00        |spacemit,k1-x.|
0000000e

FYI: I just attached the ASCII logo with 18 characters tall here.
spacemit2.txt

Dr-Noob · 2024-09-29T13:23:28Z

Hi, thanks for the patience. I have updated branch i290, can you try it please?

git clone https://github.com/Dr-Noob/cpufetch
cd cpufetch
git checkout i290
make
./cpufetch

I have a patch ready to detect the microarchitecture based on marchid. However, it's not clear what is the name of the microarchitecture here. I understand that the SoC name is Spacemit X60 (correct me if I'm wrong) but it's not clear what is the microarchitecture. What should it print?

cwt · 2024-10-01T08:20:04Z

Here the result from i290:

However, if compared with VisionFive 2:

and also Lichee Pi 4A:

I think the SoC name for Jupiter should be "Milk-V Jupiter" for consistentcy with VF2 and LPi4A, and the microarchitecture should be "SpacemiT X60" or just "X60" as same as "U74" on VF2, right?

Dr-Noob · 2024-10-02T07:25:03Z

Regarding your examples, VisionFive should be ok, but please note that Lichee Pi 4A is wrong (as noted in #219). SoC is system-on-chip so it has nothing to do with the SBC vendor (Milk-V Jupiter in your case). I believe that the right thing would be:

SoC: SpacemiT K1
Microarchitecture: X60

What do you think? Also, is it SpacemiT K1 or SpacemiT K1-X? Asking because in the compatible file you share there is also an X at the end.

Dr-Noob · 2024-10-02T07:44:03Z

I have pushed a new patch. Please do git pull when you enter the cpufetch directory to get the latest changes. Let me know what do you get, thanks!

cwt · 2024-10-02T09:02:40Z

Result from the new code:

About k1 or k1-x, according to their kernel source:

So, there are k1 and k2, and k1 also has sub-model k1-x and k1-pro.
I'm quite +1 on the name k1-x.

Dr-Noob · 2024-10-06T17:16:03Z

SoC name updated, can you please run ./cpufetch --verbose to see why the microarchitecture is not detected?

cwt · 2024-10-07T05:25:45Z

SoC name updated, can you please run ./cpufetch --verbose to see why the microarchitecture is not detected?

$ ./cpufetch --verbose
[WARNING]: parse_cpuinfo_field: Unable to find field uarch              : 
[WARNING]: get_uarch_from_cpuinfo: Unable to detect microarchitecture using uarch: cpuinfo_str is NULL
[WARNING]: strtol: Numerical result out of range:

[WARNING]: Unknown microarchitecture detected: marchid=0x00000000

                                                               SoC:                 SpacemiT K1-X
                                                               Technology:          22nm
                                ************                   Microarchitecture:   Unknown
                    %%%%%%%%%    ***********                   Cores:               8 cores
                    %%%%%%%%%%   **********                    Max Frequency:       1.800 GHz
                    %%%%%%%%%    *********                     Extensions:          rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
                    %           ********                        - (I) Integer Instruction Set
                    %%      .*********     %                    - (M) Integer Multiplication and Division
                    %%%%     *******     %%%                    - (A) Atomic Instructions
                    %%%%%%.    ****    %%%%%                    - (F) Single-Precision Floating-Point
                    %%%%%%%%.        %%%%%%%                    - (D) Double-Precision Floating-Point
                                                                - (C) Compressed Instructions
                                                                - (V) Vector Operations
 ###########   ##   .#########    #########   .##           ##  - (Sscofpmf) Count OverFlow and Privilege Mode Filtering
 ##        ##  ##  ##           ##              ###       ###   - (Sstc) S and VS level Time Compare
 ###########   ##  ##########. ##          ####  .##     ##     - (Svpbmt) Page-based Memory Types
 ##     ###    ##           ##. ##                 ### ###      - (Zicbom) Cache Block Management Operations
 ##       ###  ##  ##########.   ##########          ###        - (Zihintpause) Pause Hint
                                                                - (Zicboz) Cache Block Zero Operations
                                                                - (Zicbop) Cache Block Prefetch Operations
                                                               Peak Performance:    14.40 GFLOP/s

Dr-Noob · 2024-10-07T07:45:29Z

Excellent feedback! The patch I have just pushed should work.

cwt · 2024-10-07T08:14:41Z

Excellent feedback! The patch I have just pushed should work.

Cool! Just git pull and rebuild again:

$ ./cpufetch

                                                               SoC:                 SpacemiT K1-X
                                                               Technology:          22nm
                                ************                   Microarchitecture:   X60
                    %%%%%%%%%    ***********                   Cores:               8 cores
                    %%%%%%%%%%   **********                    Max Frequency:       1.800 GHz
                    %%%%%%%%%    *********                     Extensions:          rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause
                    %           ********                        - (I) Integer Instruction Set
                    %%      .*********     %                    - (M) Integer Multiplication and Division
                    %%%%     *******     %%%                    - (A) Atomic Instructions
                    %%%%%%.    ****    %%%%%                    - (F) Single-Precision Floating-Point
                    %%%%%%%%.        %%%%%%%                    - (D) Double-Precision Floating-Point
                                                                - (C) Compressed Instructions
                                                                - (V) Vector Operations
 ###########   ##   .#########    #########   .##           ##  - (Sscofpmf) Count OverFlow and Privilege Mode Filtering
 ##        ##  ##  ##           ##              ###       ###   - (Sstc) S and VS level Time Compare
 ###########   ##  ##########. ##          ####  .##     ##     - (Svpbmt) Page-based Memory Types
 ##     ###    ##           ##. ##                 ### ###      - (Zicbom) Cache Block Management Operations
 ##       ###  ##  ##########.   ##########          ###        - (Zihintpause) Pause Hint
                                                                - (Zicboz) Cache Block Zero Operations
                                                                - (Zicbop) Cache Block Prefetch Operations
                                                               Peak Performance:    14.40 GFLOP/s

Could you also use this new logo file? https://github.com/user-attachments/files/17092416/spacemit2.txt

cwt · 2024-10-10T03:14:05Z

@Dr-Noob just saw that you already update i290

Getting these 3 RISC-V cpuinfo fields allows the detection of microarchitecture (and other information), extending the RISC-V detection capabilities. In particular, this is used here to detect the marchid of Spacemit X60 uarch. This commit also changes how the microarchitecture is fetched (i.e., get_uarch) so that it does not rely only in the uarch field in cpuinfo, but also on the marchid value.

Dr-Noob · 2024-10-10T07:42:19Z

My bad, I thought I added a comment here after pushing the latest patches.

It was a long ride but it's good to see everything is working nicely now! I have added an extra space on the logo and pushed all the changes to master. If you could check one last time to ensure that master works as expected it would be nice. Then we can mark this as completed and close the issue.

cwt · 2024-10-11T12:40:08Z

@Dr-Noob Just check the master branch, everything seem fine. I'm closing this issue now.

Dr-Noob mentioned this issue Sep 22, 2024

Propose for SpacemiT ASCII Logo #290

Closed

Dr-Noob added a commit that referenced this issue Oct 10, 2024

[v1.06][RISCV] Add support for SpacemiT K1-X SoC (#286)

a0c08cc

cwt closed this as completed Oct 11, 2024

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Unknown SoC, Technology, and Microarchitecture on SpacemiT K1/M1 #286

Unknown SoC, Technology, and Microarchitecture on SpacemiT K1/M1 #286

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Unknown SoC, Technology, and Microarchitecture on SpacemiT K1/M1 #286

Unknown SoC, Technology, and Microarchitecture on SpacemiT K1/M1 #286

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