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[ARM] Incorrect detect on Snapdragon 7+ Gen2 #253

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LXY1226 opened this issue Jul 16, 2024 · 7 comments
Closed

[ARM] Incorrect detect on Snapdragon 7+ Gen2 #253

LXY1226 opened this issue Jul 16, 2024 · 7 comments
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@LXY1226
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LXY1226 commented Jul 16, 2024

Behaivor:
Screenshot_2024-07-16-13-29-22-728_com termux

cpufetch --debug :

cpufetch v1.05 (Android ARM build)
[Core 0] 0x410FD463 1804 MHz
[Core 1] 0x410FD463 1804 MHz
[Core 2] 0x410FD463 1804 MHz
[Core 3] 0x410FD463 1804 MHz
[Core 4] 0x412FD470 2496 MHz
[Core 5] 0x412FD470 2496 MHz
[Core 6] 0x412FD470 2496 MHz
[Core 7] 0x412FD480 2918 MHz
@LXY1226 LXY1226 changed the title [ARM] Incorrect detect on Snapdragon 7 Gen2 [ARM] Incorrect detect on Snapdragon 7+ Gen2 Jul 16, 2024
@Dr-Noob
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Dr-Noob commented Jul 16, 2024

Interesting, thanks for the report. Could you post the result of cat /proc/cpuinfo and cpufetch --verbose?

According to this, taro should be Gen 8 and ukee should be Gen 7. It could be the case that your OS is wrongly reporting taro. Did you change the ROM in your phone?

@Dr-Noob Dr-Noob added the bug Something isn't working label Jul 16, 2024
@LXY1226
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LXY1226 commented Jul 16, 2024

seems there is nothing useful in /proc/cpuinfo even after root.

output
processor       : 0
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x0
CPU part        : 0xd46
CPU revision    : 3

processor       : 1
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x0
CPU part        : 0xd46
CPU revision    : 3

processor       : 2
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x0
CPU part        : 0xd46
CPU revision    : 3

processor       : 3
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x0
CPU part        : 0xd46
CPU revision    : 3

processor       : 4
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x2
CPU part        : 0xd47
CPU revision    : 0

processor       : 5
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x2
CPU part        : 0xd47
CPU revision    : 0

processor       : 6
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x2
CPU part        : 0xd47
CPU revision    : 0

processor       : 7
BogoMIPS        : 38.40
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
CPU implementer : 0x41
CPU architecture: 8
CPU variant     : 0x2
CPU part        : 0xd48
CPU revision    : 0

and cpufetch --verbose gives two warning:

[WARNING]: SoC detection failed using /proc/cpuinfo: No string found
[WARNING]: SoC detection failed using Android property ro.product.board: marble

I'm using the last un-touched MIUI (rooted, only) before it breaking into another name HyperOS. The codename of this phone is marble which matches marble.dts in the repo you noted.
And in getprop I got some usable thing:

[ro.boot.product.vendor.sku]: [ukee]
[ro.media.xml_variant.codecs]: [_ukee]
[ro.media.xml_variant.codecs_performance]: [_ukee]
[ro.vendor.qti.soc_name]: [ukee]
[vendor.media.target_variant]: [_ukee]

[ro.soc.model]: [SM7475]
[ro.vendor.qti.soc_model]: [SM7475]

It might helps you but seems unknown if it will consist in other devices not running MIUI.

sorry for bad grammar and word ;p

@Dr-Noob
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Dr-Noob commented Jul 17, 2024

Thanks for the excellent feedback! This is easily fixable, but I'm still intrigued why it is getting the wrong SoC name. It seems like it is getting taro from ro.board.platform. Could you provide the value for ro.board.platform in your phone?

@LXY1226
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LXY1226 commented Jul 17, 2024

getprop | grep taro:

[ro.board.platform]: [taro]
[ro.gfx.driver.1]: [com.qualcomm.qti.gpudrivers.taro.api32]

getprop | grep ro.board

[ro.board.api_level]: [31]
[ro.board.first_api_level]: [31]
[ro.board.platform]: [taro]

seems like there are tons of put-together systems :(

@Dr-Noob
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Dr-Noob commented Jul 18, 2024

Yeah, just like I was suspecting. If Android is sometimes incorrectly reporting your SoC as taro and also as ukee there is little to be done. However, I have noticed that you have available ro.soc.model which gives you the codename for the SoC. I have pushed a couple of commits into a new branch called i253. Could you try with that branch and run cpufetch --verbose to confirm that it is actually getting the SoC from ro.soc.model?

@LXY1226
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LXY1226 commented Jul 18, 2024

Yes, it now returns the model number correctly, which is awesome. Hopefully this fix will be compatible with more systems outside of the rules.

Screenshot_2024-07-19-07-34-25-297_com termux

A big thank you to you.👍🏻

@Dr-Noob
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Dr-Noob commented Jul 19, 2024

Awesome, thank your for the feedback, I will merge this into the master branch now 👍

@Dr-Noob Dr-Noob closed this as completed Jul 19, 2024
Dr-Noob added a commit that referenced this issue Jul 19, 2024
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