From fbb4f481760d6f6455470fa9476b778266399665 Mon Sep 17 00:00:00 2001
From: Wunkolo <Wunkolo@gmail.com>
Date: Sun, 1 Sep 2024 01:03:15 -0700
Subject: [PATCH] Use `ID_AA64ISAR0_EL1` register for WoA feature detection

The `CP 4030` register maps to the `ID_AA64ISAR0_EL1` register on
windows.
---
 src/arm/midr.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/arm/midr.c b/src/arm/midr.c
index f33b70a0..183616a8 100644
--- a/src/arm/midr.c
+++ b/src/arm/midr.c
@@ -272,6 +272,22 @@ struct features* get_features_info(void) {
   feat->NEON = true;
   feat->SVE = false;
   feat->SVE2 = false;
+#elif defined _WIN32
+  // CP 4030 maps to the ID_AA64ISAR0_EL1 register on Windows
+  // https://developer.arm.com/documentation/100798/0300/register-descriptions/aarch64-system-registers/id-aa64isar0-el1--aarch64-instruction-set-attribute-register-0--el1
+  long isar0 = 0;
+  if(!get_win32_core_info_64(0, "CP 4030", &isar0)) {
+    printWarn("Unable to retrieve ISAR0 via registry");
+  }
+  else {
+    feat->AES = (isar0 >> 4) & 0xF ? true : false;
+    feat->CRC32 = (isar0 >> 16) & 0xF ? true : false;
+    feat->SHA1 = (isar0 >> 8) & 0xF ? true : false;
+    feat->SHA2 = (isar0 >> 12) & 0xF ? true : false;
+  }
+  feat->NEON = true;
+  feat->SVE = false;
+  feat->SVE2 = false;
 #endif  // ifdef __linux__
 
   if (feat->SVE || feat->SVE2) {