forked from esmjanus/snes9xTYL
-
Notifications
You must be signed in to change notification settings - Fork 0
/
apu.h
577 lines (498 loc) · 18.6 KB
/
apu.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
/**********************************************************************************
Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
(c) Copyright 1996 - 2002 Gary Henderson ([email protected]),
Jerremy Koot ([email protected])
(c) Copyright 2002 - 2004 Matthew Kendora
(c) Copyright 2002 - 2005 Peter Bortas ([email protected])
(c) Copyright 2004 - 2005 Joel Yliluoma (http://iki.fi/bisqwit/)
(c) Copyright 2001 - 2006 John Weidman ([email protected])
(c) Copyright 2002 - 2006 funkyass ([email protected]),
Kris Bleakley ([email protected])
(c) Copyright 2002 - 2007 Brad Jorsch ([email protected]),
Nach ([email protected]),
zones ([email protected])
(c) Copyright 2006 - 2007 nitsuja
BS-X C emulator code
(c) Copyright 2005 - 2006 Dreamer Nom,
zones
C4 x86 assembler and some C emulation code
(c) Copyright 2000 - 2003 _Demo_ ([email protected]),
Nach,
zsKnight ([email protected])
C4 C++ code
(c) Copyright 2003 - 2006 Brad Jorsch,
Nach
DSP-1 emulator code
(c) Copyright 1998 - 2006 _Demo_,
Andreas Naive ([email protected])
Gary Henderson,
Ivar ([email protected]),
John Weidman,
Kris Bleakley,
Matthew Kendora,
Nach,
neviksti ([email protected])
DSP-2 emulator code
(c) Copyright 2003 John Weidman,
Kris Bleakley,
Lord Nightmare ([email protected]),
Matthew Kendora,
neviksti
DSP-3 emulator code
(c) Copyright 2003 - 2006 John Weidman,
Kris Bleakley,
Lancer,
z80 gaiden
DSP-4 emulator code
(c) Copyright 2004 - 2006 Dreamer Nom,
John Weidman,
Kris Bleakley,
Nach,
z80 gaiden
OBC1 emulator code
(c) Copyright 2001 - 2004 zsKnight,
pagefault ([email protected]),
Kris Bleakley,
Ported from x86 assembler to C by sanmaiwashi
SPC7110 and RTC C++ emulator code
(c) Copyright 2002 Matthew Kendora with research by
zsKnight,
John Weidman,
Dark Force
S-DD1 C emulator code
(c) Copyright 2003 Brad Jorsch with research by
Andreas Naive,
John Weidman
S-RTC C emulator code
(c) Copyright 2001-2006 byuu,
John Weidman
ST010 C++ emulator code
(c) Copyright 2003 Feather,
John Weidman,
Kris Bleakley,
Matthew Kendora
Super FX x86 assembler emulator code
(c) Copyright 1998 - 2003 _Demo_,
pagefault,
zsKnight,
Super FX C emulator code
(c) Copyright 1997 - 1999 Ivar,
Gary Henderson,
John Weidman
Sound DSP emulator code is derived from SNEeSe and OpenSPC:
(c) Copyright 1998 - 2003 Brad Martin
(c) Copyright 1998 - 2006 Charles Bilyue'
SH assembler code partly based on x86 assembler code
(c) Copyright 2002 - 2004 Marcus Comstedt ([email protected])
2xSaI filter
(c) Copyright 1999 - 2001 Derek Liauw Kie Fa
HQ2x, HQ3x, HQ4x filters
(c) Copyright 2003 Maxim Stepin ([email protected])
Win32 GUI code
(c) Copyright 2003 - 2006 blip,
funkyass,
Matthew Kendora,
Nach,
nitsuja
Mac OS GUI code
(c) Copyright 1998 - 2001 John Stiles
(c) Copyright 2001 - 2007 zones
Specific ports contains the works of other authors. See headers in
individual files.
Snes9x homepage: http://www.snes9x.com
Permission to use, copy, modify and/or distribute Snes9x in both binary
and source form, for non-commercial purposes, is hereby granted without
fee, providing that this license information and copyright notice appear
with all copies and any derived work.
This software is provided 'as-is', without any express or implied
warranty. In no event shall the authors be held liable for any damages
arising from the use of this software or it's derivatives.
Snes9x is freeware for PERSONAL USE only. Commercial users should
seek permission of the copyright holders first. Commercial use includes,
but is not limited to, charging money for Snes9x or software derived from
Snes9x, including Snes9x or derivatives in commercial game bundles, and/or
using Snes9x as a promotion for your commercial product.
The copyright holders request that bug fixes and improvements to the code
should be forwarded to them so everyone can benefit from the modifications
in future versions.
Super NES and Super Nintendo Entertainment System are trademarks of
Nintendo Co., Limited and its subsidiary companies.
**********************************************************************************/
#ifndef _apu_h_
#define _apu_h_
#include "spc700.h"
//extern int old_cpu_cycles;
#define APU_EVENT_SIZE (65536)
#define APU_EVENT_MASK (APU_EVENT_SIZE-1)
typedef struct {
int apu_cycles_left;
#ifdef ME_SOUND
#endif
int apu_glob_cycles;
int apu_event1_cpt1;
int apu_event2_cpt1;
int apu_event1_cpt2;
int apu_event2_cpt2;
int apu_init_after_load;
int apu_can_execute;
int apu_ram_write_cpt1;
int apu_ram_write_cpt2;
volatile int apu_event1[APU_EVENT_SIZE];//ng
int apu_event2[APU_EVENT_SIZE];
unsigned short apu_ram_write_log[APU_EVENT_SIZE];//ok
#ifdef ME_SOUND
int32 APU_Cycles; // me:rw main:rw <-danger? TBD
uint8 APU_OutPorts[4]; // me:w main:r
#endif
bool8 APUExecuting; // me:rw main:w(DMA)
}SAPUEVENTS;
typedef struct {
int32 APU_Cycles; // me:rw main:rw <-danger? TBD
uint8 APU_OutPorts[4]; // me:w main:r
bool8 APUExecuting; // me:rw main:w(DMA)
}SAPUEVENTS2;
extern SAPUEVENTS stAPUEvents;
#ifndef ME_SOUND
//#define old_cpu_cycles stAPUEvents.old_cpu_cycles
#define apu_cycles_left stAPUEvents.apu_cycles_left
#define apu_glob_cycles stAPUEvents.apu_glob_cycles
#define apu_event1 stAPUEvents.apu_event1
#define apu_event2 stAPUEvents.apu_event2
#define apu_event1_cpt1 stAPUEvents.apu_event1_cpt1
#define apu_event2_cpt1 stAPUEvents.apu_event2_cpt1
#define apu_event1_cpt2 stAPUEvents.apu_event1_cpt2
#define apu_event2_cpt2 stAPUEvents.apu_event2_cpt2
#define apu_init_after_load stAPUEvents.apu_init_after_load
#define apu_can_execute stAPUEvents.apu_can_execute
#define apu_ram_write_cpt1 stAPUEvents.apu_ram_write_cpt1
#define apu_ram_write_cpt2 stAPUEvents.apu_ram_write_cpt2
#define apu_ram_write_log stAPUEvents.apu_ram_write_log
#else
//extern int old_cpu_cycles;
/*
typedef struct {
int apu_glob_cycles; // me:r main:rw
int apu_event1_cpt1; // me:rw main:r
int apu_event1_cpt2; // me:r main:rw
// int apu_event2_cpt1; // me:rw main:r
// int apu_event2_cpt2; // me:r main:rw
int32 APU_Cycles; // me:rw main:rw <-danger? TBD
bool8 IAPU_APUExecuting; // me:rw main:w(DMA)
int apu_ram_write_cpt1; // me:rw main:r
int apu_ram_write_cpt2; // me:r main:rw
uint8 APU_OutPorts[4]; // me:w main:r
uint32 dwDeadlockTestMain; // main:rw
uint32 dwDeadlockTestMe; // me:w main:r
uint32 adwParam[4]; // me:w main:r
// uint32 dwDummy[1]; // me: main:
int apu_event1[0xFFFF]; // me:r main:w
// int apu_event2[0xFFFF]; // me:r main:w
unsigned short apu_ram_write_log[0xFFFF]; // me:r main:w
}SAPUEVENTS;
extern SAPUEVENTS stAPUEvents;
*/
extern volatile int *apu_cycles_left_p,*apu_glob_cycles_p;
extern volatile int *apu_event1,*apu_event2,*apu_event1_cpt1_p,*apu_event2_cpt1_p,*apu_event1_cpt2_p,*apu_event2_cpt2_p;
extern volatile unsigned short *apu_ram_write_log;
extern volatile int *apu_init_after_load_,*apu_can_execute_p,*apu_ram_write_cpt1_p,*apu_ram_write_cpt2_p;
extern int apu_ram_write_cpt2_main;
extern int apu_event1_cpt2_main;
#if 1
#define apu_cycles_left (*apu_cycles_left_p)
#define apu_glob_cycles (*apu_glob_cycles_p)
#define apu_event1_cpt1 (*apu_event1_cpt1_p)
#define apu_event2_cpt1 (*apu_event2_cpt1_p)
#define apu_event1_cpt2 (*apu_event1_cpt2_p)
#define apu_event2_cpt2 (*apu_event2_cpt2_p)
#define apu_init_after_load (*apu_init_after_load_)
#define apu_can_execute (*apu_can_execute_p)
#define apu_ram_write_cpt1 (*apu_ram_write_cpt1_p)
#define apu_ram_write_cpt2 (*apu_ram_write_cpt2_p)
#elif 0
#define apu_cycles_left (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_cycles_left)
#define apu_glob_cycles (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_glob_cycles)
#define apu_event1_cpt1 (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_event1_cpt1)
#define apu_event2_cpt1 (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_event2_cpt1)
#define apu_event1_cpt2 (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_event1_cpt2)
#define apu_event2_cpt2 (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_event2_cpt2)
#define apu_init_after_load (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_init_after_load)
#define apu_can_execute (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_can_execute)
#define apu_ram_write_cpt1 (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_ram_write_cpt1)
#define apu_ram_write_cpt2 (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->apu_ram_write_cpt2)
#else
#define apu_cycles_left (stAPUEvents_p->apu_cycles_left)
#define apu_glob_cycles (stAPUEvents_p->apu_glob_cycles)
#define apu_event1_cpt1 (stAPUEvents_p->apu_event1_cpt1)
#define apu_event2_cpt1 (stAPUEvents_p->apu_event2_cpt1)
#define apu_event1_cpt2 (stAPUEvents_p->apu_event1_cpt2)
#define apu_event2_cpt2 (stAPUEvents_p->apu_event2_cpt2)
#define apu_init_after_load (stAPUEvents_p->apu_init_after_load)
#define apu_can_execute (stAPUEvents_p->apu_can_execute)
#define apu_ram_write_cpt1 (stAPUEvents_p->apu_ram_write_cpt1)
#define apu_ram_write_cpt2 (stAPUEvents_p->apu_ram_write_cpt2)
#endif
#endif
#ifdef ME_SOUND
extern SAPUEVENTS * const stAPUEvents_p;
//extern volatile int32 * const Uncache_APU_Cycles_p;
//extern uint8 * const Uncache_APU_OutPorts_p;
//extern volatile bool8 * const Uncache_IAPU_APUExecuting_p;
//1 単体
//#define Uncache_APU_Cycles (*Uncache_APU_Cycles_p)
//#define Uncache_APU_OutPorts Uncache_APU_OutPorts_p
//#define IAPU_APUExecuting (*Uncache_IAPU_APUExecuting_p)
//2 構造体
//#define Uncache_APU_Cycles (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->APU_Cycles)
//#define Uncache_APU_OutPorts (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->APU_OutPorts)
//#define IAPU_APUExecuting (((SAPUEVENTS*)UNCACHE_PTR(&stAPUEvents))->APUExecuting)
//2.5 構造体
#define Uncache_APU_Cycles (stAPUEvents_p->APU_Cycles)
#define Uncache_APU_OutPorts (stAPUEvents_p->APU_OutPorts)
#define IAPU_APUExecuting (stAPUEvents_p->APUExecuting)
//3 スクラッチパッドできない
//#define Uncache_APU_Cycles (*(int32*)UNCACHE_PTR(0x10400))
//#define Uncache_APU_OutPorts ((uint8*)UNCACHE_PTR(0x10404))
//#define IAPU_APUExecuting (*(int32*)UNCACHE_PTR(0x10408))
//毎回で無く、一定期間ごとにIAPU_APUExecuting更新する
#if 1
#define FAST_IAPU_APUEXECUTING_CHECK
#endif
//#define IAPU_APUExecuting IAPUuncached.APUExecuting //不具合の可能性あり
#else
#define Uncache_APU_Cycles APUPack.APU.Cycles
#define Uncache_APU_OutPorts APUPack.APU.OutPorts
#define IAPU_APUExecuting IAPUuncached.APUExecuting
#define IAPU_APUExecuting_Main IAPU_APUExecuting
#endif
#ifdef ME_SOUND
#ifndef FAST_IAPU_APUEXECUTING_CHECK
#define IAPU_APUExecuting_Main IAPU_APUExecuting
#define UPDATE_APU_COUNTER() {\
if (IAPU_APUExecuting_Main) {\
if (CPUPack.CPU.Cycles-old_cpu_cycles<0) msgBoxLines("1",60);\
else cpu_glob_cycles += CPUPack.CPU.Cycles-old_cpu_cycles;\
old_cpu_cycles=CPUPack.CPU.Cycles;\
apu_glob_cycles=cpu_glob_cycles;\
if (cpu_glob_cycles>=0x00700000) {\
APU_EXECUTE2 ();\
}\
}\
}
#define RESET_APU_COUNTER()
#define FLUSH_APU()
#define apu_glob_cycles_Main apu_glob_cycles
#else
struct SIAPU_APUExecuting
{
uint8 _APUExecuting_Main_Counter;
bool8 _IAPU_APUExecuting_Main;
uint8 sp[2];
int _apu_glob_cycles_Main;
};
//extern bool8 IAPU_APUExecuting_Main;
//extern uint8 APUExecuting_Main_Counter;
//extern int apu_glob_cycles_Main;
extern struct SIAPU_APUExecuting _IAPU_APUExecuting;
#define IAPU_APUExecuting_Main CPUPack._IAPU_APUExecuting_Main
#define APUExecuting_Main_Counter CPUPack._APUExecuting_Main_Counter
#define apu_glob_cycles_Main CPUPack._apu_glob_cycles_Main
#define RESET_APU_COUNTER() {APUExecuting_Main_Counter=0;}
#define FLUSH_APU() {apu_glob_cycles=apu_glob_cycles_Main; APUExecuting_Main_Counter=0;}
#define UPDATE_APU_COUNTER() {\
if (IAPU_APUExecuting_Main){\
cpu_glob_cycles += CPU.Cycles-old_cpu_cycles;\
old_cpu_cycles=CPU.Cycles;\
apu_glob_cycles_Main=cpu_glob_cycles;\
if (cpu_glob_cycles>=0x00700000) {\
APU_EXECUTE2();\
}\
}\
if (APUExecuting_Main_Counter==0){\
FLUSH_APU();\
}\
APUExecuting_Main_Counter++;\
}
#endif
#else
//no Me_sound
#define UPDATE_APU_COUNTER() {\
if (IAPU_APUExecuting_Main) {\
if (CPU.Cycles-old_cpu_cycles<0) msgBoxLines("1",60);\
else cpu_glob_cycles += CPU.Cycles-old_cpu_cycles;\
old_cpu_cycles=CPU.Cycles;\
apu_glob_cycles=cpu_glob_cycles;\
if (cpu_glob_cycles>=0x00700000) {\
APU_EXECUTE2 ();\
}\
}\
}
#define RESET_APU_COUNTER()
#define FLUSH_APU()
#define apu_glob_cycles_Main apu_glob_cycles
#endif
struct SIAPU
{
uint8 *PC;
uint8 *RAM;
uint8 *DirectPage;
bool8 APUExecuting;
uint8 sp[3];
uint32 Address;
uint8 *WaitAddress1;
uint8 *WaitAddress2;
uint32 WaitCounter;
// uint8 *ShadowRAM;
// uint8 *CachedSamples;
uint8 Bit;
uint8 _Carry;
uint8 _Zero;
uint8 _Overflow;
uint32 TimerErrorCounter;
int32 NextAPUTimerPos;
int32 APUTimerCounter;
uint32 Scanline;
int32 OneCycle;
int32 TwoCycles;
};
struct SAPU
{
int32 Cycles;
bool8 ShowROM;
uint8 Flags;
uint8 KeyedChannels;
uint8 dummy_for_align;
uint8 OutPorts [4];
uint8 DSP [0x80];
uint8 ExtraRAM [64];
uint16 Timer [3];
uint16 TimerTarget [3];
bool8 TimerEnabled [3];
bool8 TimerValueWritten [3];
uint8 sp[2];
};
struct SAPUPACK
{
struct SAPURegisters APURegisters; // 8bytes
struct SIAPU IAPU; // 60bytes
struct SAPU APU; // 228bytes
int apu_event1_cpt1_me;
int apu_ram_write_cpt1_me;
};
EXTERN_C struct SAPUPACK APUPack;
//EXTERN_C struct SAPU APU;
//EXTERN_C struct SIAPU IAPU;
//EXTERN_C struct SAPURegisters APURegisters;
//EXTERN_C struct SAPU APUuncached;
EXTERN_C struct SIAPU IAPUuncached;
//#define APURegistersUncached APURegisters
//#define IAPUuncached IAPU
#ifdef ME_SOUND
//extern SIAPU* Uncache_IAPU_p;
//#define IAPU (*Uncache_IAPU_p)
#define IAPU APUPack.IAPU
extern SIAPU* const Uncache_Uncache_IAPU_p;
//#define IAPUuncached (*Uncache_Uncache_IAPU_p)
#define IAPUuncached IAPU
EXTERN_C SAPU * const Uncache_Uncache_APU_p;
//#define APUuncached (*Uncache_Uncache_APU_p)
#define APUuncached APUPack.APU
EXTERN_C SAPURegisters* const Uncache_APURegisters_p;
//#define APURegistersUncached (*Uncache_APURegisters_p)
//EXTERN_C struct SAPURegisters APURegistersUncached;
#define APURegistersUncached APURegisters
#else
#define IAPU APUPack.IAPU
#define APUuncached APUPack.APU
EXTERN_C struct SAPURegisters APURegistersUncached;
#endif
#define APURegisters APUPack.APURegisters
static inline void S9xAPUUnpackStatus()
{
((IAPU._Zero)) = (((APURegisters.P) & Zero) == 0) | ((APURegisters.P) & Negative);
((IAPU._Carry)) = ((APURegisters.P) & Carry);
((IAPU._Overflow)) = ((APURegisters.P) & Overflow) >> 6;
}
STATIC inline void S9xAPUPackStatus()
{
(APURegisters.P) &= ~(Zero | Negative | Carry | Overflow);
(APURegisters.P) |= ((IAPU._Carry)) | ((((IAPU._Zero)) == 0) << 1) |
(((IAPU._Zero)) & 0x80) | (((IAPU._Overflow)) << 6);
}
static inline void S9xAPUUnpackStatusUncached()
{
((IAPUuncached._Zero)) = (((APURegistersUncached.P) & Zero) == 0) | ((APURegistersUncached.P) & Negative);
((IAPUuncached._Carry)) = ((APURegistersUncached.P) & Carry);
((IAPUuncached._Overflow)) = ((APURegistersUncached.P) & Overflow) >> 6;
}
STATIC inline void S9xAPUPackStatusUncached()
{
(APURegistersUncached.P) &= ~(Zero | Negative | Carry | Overflow);
(APURegistersUncached.P) |= ((IAPUuncached._Carry)) | ((((IAPUuncached._Zero)) == 0) << 1) |
(((IAPUuncached._Zero)) & 0x80) | (((IAPUuncached._Overflow)) << 6);
}
START_EXTERN_C
void S9xResetAPU (void);
bool8 S9xInitAPU ();
void S9xDeinitAPU ();
void S9xDecacheSamples ();
int S9xTraceAPU ();
int S9xAPUOPrint (char *buffer, uint16 Address);
void S9xSetAPUControl (uint8 byte);
void S9xSetAPUDSP (uint8 byte);
uint8 S9xGetAPUDSP ();
void S9xSetAPUTimer (uint16 Address, uint8 byte);
bool8 S9xInitSound (int quality, bool8 stereo, int buffer_size);
void S9xFreeSound ();
void S9xAllocSound ();
void S9xOpenCloseSoundTracingFile (bool8);
void S9xPrintAPUState ();
extern uint16 S9xAPUCycles [256]; // Scaled cycle lengths
extern uint8 S9xAPUCycleLengths [256]; // Raw data.
extern void (*S9xApuOpcodes [256]) (void);
void S9xSuspendSoundProcess(void);
void S9xResumeSoundProcess(void);
END_EXTERN_C
#define APU_VOL_LEFT 0x00
#define APU_VOL_RIGHT 0x01
#define APU_P_LOW 0x02
#define APU_P_HIGH 0x03
#define APU_SRCN 0x04
#define APU_ADSR1 0x05
#define APU_ADSR2 0x06
#define APU_GAIN 0x07
#define APU_ENVX 0x08
#define APU_OUTX 0x09
#define APU_MVOL_LEFT 0x0c
#define APU_MVOL_RIGHT 0x1c
#define APU_EVOL_LEFT 0x2c
#define APU_EVOL_RIGHT 0x3c
#define APU_KON 0x4c
#define APU_KOFF 0x5c
#define APU_FLG 0x6c
#define APU_ENDX 0x7c
#define APU_EFB 0x0d
#define APU_PMON 0x2d
#define APU_NON 0x3d
#define APU_EON 0x4d
#define APU_DIR 0x5d
#define APU_ESA 0x6d
#define APU_EDL 0x7d
#define APU_C0 0x0f
#define APU_C1 0x1f
#define APU_C2 0x2f
#define APU_C3 0x3f
#define APU_C4 0x4f
#define APU_C5 0x5f
#define APU_C6 0x6f
#define APU_C7 0x7f
#define APU_SOFT_RESET 0x80
#define APU_MUTE 0x40
#define APU_ECHO_DISABLED 0x20
#define FREQUENCY_MASK 0x3fff
START_EXTERN_C
extern uint8 APUI00a,APUI00b,APUI00c;
extern uint8 APUI01a,APUI01b,APUI01c;
extern uint8 APUI02a,APUI02b,APUI02c;
extern uint8 APUI03a,APUI03b,APUI03c;
END_EXTERN_C
#endif