diff --git a/fuzzers/binary_only/fuzzbench_fork_qemu/src/fuzzer.rs b/fuzzers/binary_only/fuzzbench_fork_qemu/src/fuzzer.rs index fba6e23f36..8c89b4a6cc 100644 --- a/fuzzers/binary_only/fuzzbench_fork_qemu/src/fuzzer.rs +++ b/fuzzers/binary_only/fuzzbench_fork_qemu/src/fuzzer.rs @@ -196,7 +196,7 @@ fn fuzz( } } - println!("Break at {:#x}", qemu.read_reg::<_, u64>(Regs::Pc).unwrap()); + println!("Break at {:#x}", qemu.read_reg(Regs::Pc).unwrap()); let stack_ptr: u64 = qemu.read_reg(Regs::Sp).unwrap(); let mut ret_addr = [0; 8]; diff --git a/fuzzers/binary_only/fuzzbench_qemu/src/fuzzer.rs b/fuzzers/binary_only/fuzzbench_qemu/src/fuzzer.rs index 5fc1e3dd9d..8a22ee8962 100644 --- a/fuzzers/binary_only/fuzzbench_qemu/src/fuzzer.rs +++ b/fuzzers/binary_only/fuzzbench_qemu/src/fuzzer.rs @@ -194,7 +194,7 @@ fn fuzz( } } - println!("Break at {:#x}", qemu.read_reg::<_, u64>(Regs::Pc).unwrap()); + println!("Break at {:#x}", qemu.read_reg(Regs::Pc).unwrap()); let stack_ptr: u64 = qemu.read_reg(Regs::Sp).unwrap(); let mut ret_addr = [0; 8]; diff --git a/libafl_qemu/src/arch/aarch64.rs b/libafl_qemu/src/arch/aarch64.rs index 9a8395f17c..bb1b49d0ed 100644 --- a/libafl_qemu/src/arch/aarch64.rs +++ b/libafl_qemu/src/arch/aarch64.rs @@ -91,10 +91,7 @@ pub fn capstone() -> capstone::arch::arm64::ArchCapstoneBuilder { pub type GuestReg = u64; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.read_reg(Regs::Lr) } @@ -105,10 +102,11 @@ impl crate::ArchExtras for crate::CPU { self.write_reg(Regs::Lr, val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; let reg_id = match idx { diff --git a/libafl_qemu/src/arch/arm.rs b/libafl_qemu/src/arch/arm.rs index 3b46323040..952d08ae6a 100644 --- a/libafl_qemu/src/arch/arm.rs +++ b/libafl_qemu/src/arch/arm.rs @@ -88,10 +88,7 @@ pub fn capstone_thumb() -> capstone::arch::arm::ArchCapstoneBuilder { pub type GuestReg = u32; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.read_reg(Regs::Lr) } @@ -102,10 +99,11 @@ impl crate::ArchExtras for crate::CPU { self.write_reg(Regs::Lr, val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; let reg_id = match idx { diff --git a/libafl_qemu/src/arch/hexagon.rs b/libafl_qemu/src/arch/hexagon.rs index 83ee00fee0..113313dd6c 100644 --- a/libafl_qemu/src/arch/hexagon.rs +++ b/libafl_qemu/src/arch/hexagon.rs @@ -92,10 +92,7 @@ impl Regs { pub type GuestReg = u32; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.read_reg(Regs::Lr) } @@ -106,10 +103,11 @@ impl crate::ArchExtras for crate::CPU { self.write_reg(Regs::Lr, val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; // Note that 64 bit values may be passed in two registers (and may have padding), then this mapping is off. diff --git a/libafl_qemu/src/arch/i386.rs b/libafl_qemu/src/arch/i386.rs index dbc3f576e5..435f990b34 100644 --- a/libafl_qemu/src/arch/i386.rs +++ b/libafl_qemu/src/arch/i386.rs @@ -67,10 +67,7 @@ pub fn capstone() -> capstone::arch::x86::ArchCapstoneBuilder { pub type GuestReg = u32; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { let stack_ptr: GuestReg = self.read_reg(Regs::Esp)?; let mut ret_addr = [0; size_of::()]; unsafe { self.read_mem(stack_ptr, &mut ret_addr) }; @@ -88,10 +85,11 @@ impl crate::ArchExtras for crate::CPU { Ok(()) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; match idx { diff --git a/libafl_qemu/src/arch/mips.rs b/libafl_qemu/src/arch/mips.rs index 125443ed86..0e5e1f18fb 100644 --- a/libafl_qemu/src/arch/mips.rs +++ b/libafl_qemu/src/arch/mips.rs @@ -88,10 +88,7 @@ pub fn capstone() -> capstone::arch::mips::ArchCapstoneBuilder { pub type GuestReg = u32; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.read_reg(Regs::Ra) } @@ -102,10 +99,11 @@ impl crate::ArchExtras for crate::CPU { self.write_reg(Regs::Ra, val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; let reg_id = match idx { diff --git a/libafl_qemu/src/arch/ppc.rs b/libafl_qemu/src/arch/ppc.rs index 351f3e3ea5..d8838d7d68 100644 --- a/libafl_qemu/src/arch/ppc.rs +++ b/libafl_qemu/src/arch/ppc.rs @@ -128,10 +128,7 @@ pub fn capstone() -> capstone::arch::ppc::ArchCapstoneBuilder { pub type GuestReg = u32; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.read_reg(Regs::Lr) } @@ -142,10 +139,11 @@ impl crate::ArchExtras for crate::CPU { self.write_reg(Regs::Lr, val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; let reg_id = match idx { diff --git a/libafl_qemu/src/arch/riscv.rs b/libafl_qemu/src/arch/riscv.rs index daa19954d8..99daa56f4b 100644 --- a/libafl_qemu/src/arch/riscv.rs +++ b/libafl_qemu/src/arch/riscv.rs @@ -95,10 +95,7 @@ pub fn capstone() -> capstone::arch::riscv::ArchCapstoneBuilder { } impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.read_reg(Regs::Ra) } @@ -109,10 +106,11 @@ impl crate::ArchExtras for crate::CPU { self.write_reg(Regs::Ra, val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; // Note that 64 bit values may be passed in two registers (and are even-odd eg. A0, A2 and A3 where A1 is empty), then this mapping is off. diff --git a/libafl_qemu/src/arch/x86_64.rs b/libafl_qemu/src/arch/x86_64.rs index 7e03111aa9..d48568813d 100644 --- a/libafl_qemu/src/arch/x86_64.rs +++ b/libafl_qemu/src/arch/x86_64.rs @@ -78,14 +78,11 @@ pub type GuestReg = u64; pub const PROCESS_ADDRESS_RANGE: Range = 0..0x0000_7fff_ffff_ffff; impl crate::ArchExtras for crate::CPU { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { let stack_ptr: GuestReg = self.read_reg(Regs::Rsp)?; let mut ret_addr = [0; size_of::()]; unsafe { self.read_mem_unchecked(stack_ptr, &mut ret_addr) }; - Ok(GuestReg::from_le_bytes(ret_addr).into()) + Ok(GuestReg::from_le_bytes(ret_addr)) } fn write_return_address(&self, val: T) -> Result<(), QemuRWError> @@ -99,10 +96,11 @@ impl crate::ArchExtras for crate::CPU { Ok(()) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { QemuRWError::check_conv(QemuRWErrorKind::Read, CallingConvention::Cdecl, conv)?; let reg_id = match idx { diff --git a/libafl_qemu/src/command/mod.rs b/libafl_qemu/src/command/mod.rs index 606e4bd433..ae87cfcc3f 100644 --- a/libafl_qemu/src/command/mod.rs +++ b/libafl_qemu/src/command/mod.rs @@ -106,7 +106,7 @@ macro_rules! define_std_command_manager { #[deny(unreachable_patterns)] fn parse(&self, qemu: Qemu) -> Result { let arch_regs_map: &'static EnumMap = get_exit_arch_regs(); - let cmd_id = qemu.read_reg::(arch_regs_map[ExitArgs::Cmd])? as c_uint; + let cmd_id = qemu.read_reg(arch_regs_map[ExitArgs::Cmd])? as c_uint; match cmd_id { // >::COMMAND_ID => Ok(StdCommandManagerCommands::StartPhysCommandParserCmd(>::parse(qemu, arch_regs_map)?)), diff --git a/libafl_qemu/src/command/parser.rs b/libafl_qemu/src/command/parser.rs index 8cb7aea3e2..97914b266d 100644 --- a/libafl_qemu/src/command/parser.rs +++ b/libafl_qemu/src/command/parser.rs @@ -52,7 +52,7 @@ where qemu: Qemu, arch_regs_map: &'static EnumMap, ) -> Result { - let input_phys_addr: GuestPhysAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?; + let input_phys_addr: GuestPhysAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?.into(); let max_input_size: GuestReg = qemu.read_reg(arch_regs_map[ExitArgs::Arg2])?; Ok(InputCommand::new( @@ -81,7 +81,7 @@ where qemu: Qemu, arch_regs_map: &'static EnumMap, ) -> Result { - let input_virt_addr: GuestVirtAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?; + let input_virt_addr: GuestVirtAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?.into(); let max_input_size: GuestReg = qemu.read_reg(arch_regs_map[ExitArgs::Arg2])?; Ok(InputCommand::new( @@ -109,7 +109,7 @@ where qemu: Qemu, arch_regs_map: &'static EnumMap, ) -> Result { - let input_phys_addr: GuestPhysAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?; + let input_phys_addr: GuestPhysAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?.into(); let max_input_size: GuestReg = qemu.read_reg(arch_regs_map[ExitArgs::Arg2])?; Ok(StartCommand::new(QemuMemoryChunk::phys( @@ -138,7 +138,7 @@ where qemu: Qemu, arch_regs_map: &'static EnumMap, ) -> Result { - let input_virt_addr: GuestVirtAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?; + let input_virt_addr: GuestVirtAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?.into(); let max_input_size: GuestReg = qemu.read_reg(arch_regs_map[ExitArgs::Arg2])?; Ok(StartCommand::new(QemuMemoryChunk::virt( @@ -237,7 +237,7 @@ where qemu: Qemu, arch_regs_map: &'static EnumMap, ) -> Result { - let client_version = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?; + let client_version = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?.into(); Ok(VersionCommand::new(client_version)) } @@ -283,7 +283,7 @@ where ) -> Result { let buf_addr: GuestAddr = qemu.read_reg(arch_regs_map[ExitArgs::Arg1])?; let str_size: usize = qemu - .read_reg::(arch_regs_map[ExitArgs::Arg2])? + .read_reg(arch_regs_map[ExitArgs::Arg2])? .try_into() .unwrap(); // without null byte let cpu = qemu.current_cpu().unwrap(); diff --git a/libafl_qemu/src/qemu/mod.rs b/libafl_qemu/src/qemu/mod.rs index 740322ecb4..e742dfbda1 100644 --- a/libafl_qemu/src/qemu/mod.rs +++ b/libafl_qemu/src/qemu/mod.rs @@ -320,15 +320,15 @@ impl From for MemAccessInfo { } pub trait ArchExtras { - fn read_return_address(&self) -> Result - where - T: From; + fn read_return_address(&self) -> Result; fn write_return_address(&self, val: T) -> Result<(), QemuRWError> where T: Into; - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From; + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result; fn write_function_argument( &self, conv: CallingConvention, @@ -360,10 +360,9 @@ impl CPU { unsafe { libafl_qemu_num_regs(self.ptr) } } - pub fn read_reg(&self, reg: R) -> Result + pub fn read_reg(&self, reg: R) -> Result where R: Into + Clone, - T: From, { unsafe { let reg_id = reg.clone().into(); @@ -824,9 +823,8 @@ impl Qemu { .write_reg(reg, val) } - pub fn read_reg(&self, reg: R) -> Result + pub fn read_reg(&self, reg: R) -> Result where - T: Num + PartialOrd + Copy + From, R: Into + Clone, { self.current_cpu() @@ -907,17 +905,14 @@ impl Qemu { } impl ArchExtras for Qemu { - fn read_return_address(&self) -> Result - where - T: From, - { + fn read_return_address(&self) -> Result { self.current_cpu() .ok_or(QemuRWError { kind: QemuRWErrorKind::Read, cause: QemuRWErrorCause::CurrentCpuNotFound, cpu: None, })? - .read_return_address::() + .read_return_address() } fn write_return_address(&self, val: T) -> Result<(), QemuRWError> @@ -929,13 +924,14 @@ impl ArchExtras for Qemu { .write_return_address::(val) } - fn read_function_argument(&self, conv: CallingConvention, idx: u8) -> Result - where - T: From, - { + fn read_function_argument( + &self, + conv: CallingConvention, + idx: u8, + ) -> Result { self.current_cpu() .ok_or(QemuRWError::current_cpu_not_found(QemuRWErrorKind::Read))? - .read_function_argument::(conv, idx) + .read_function_argument(conv, idx) } fn write_function_argument(